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Date: Fri, 22 Mar 2024 16:09:06 +0100
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From: neil.armstrong@linaro.org
Reply-To: neil.armstrong@linaro.org
Subject: Re: [PATCH 1/2] dt-bindings: usb: qcom,pmic-typec: drop port
 description
To: Bryan O'Donoghue <bryan.odonoghue@linaro.org>,
 Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: Bjorn Andersson <andersson@kernel.org>,
 Konrad Dybcio <konrad.dybcio@linaro.org>,
 Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
 Rob Herring <robh@kernel.org>,
 Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
 Conor Dooley <conor+dt@kernel.org>, linux-arm-msm@vger.kernel.org,
 linux-usb@vger.kernel.org, devicetree@vger.kernel.org,
 linux-kernel@vger.kernel.org
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On 22/03/2024 15:52, Bryan O'Donoghue wrote:
> On 22/03/2024 13:28, Dmitry Baryshkov wrote:
>> Then the actual usage doesn't match the schema. usb-c-connector
>> clearly defines HS, SS and SBU ports
> 
> Its a bit restrictive IMO, data-role and power-role switching is not limited to HS and in fact can be done with a GPIO for example.
> 
> /Looks in Documentation/devicetree/bindings/connector/usb-connector.yaml
> 
> Yeah I mean this just doesn't cover all use-cases ..
> 
> ports:
>      $ref: /schemas/graph.yaml#/properties/ports
>      description: OF graph bindings modeling any data bus to the connector
>        unless the bus is between parent node and the connector. Since a single
>        connector can have multiple data buses every bus has an assigned OF graph
>        port number as described below.
> 
>      properties:
>        port@0:
>          $ref: /schemas/graph.yaml#/properties/port
>          description: High Speed (HS), present in all connectors.
> 
>        port@1:
>          $ref: /schemas/graph.yaml#/properties/port
>          description: Super Speed (SS), present in SS capable connectors.
> 
>        port@2:
>          $ref: /schemas/graph.yaml#/properties/port
>          description: Sideband Use (SBU), present in USB-C. This describes the
>            alternate mode connection of which SBU is a part.
> 
> TBH I think we should drop this HS, SS stuff from the connector definition - there's nothing to say in a h/w definition anywhere HS must be a port or indeed SS - not all hardware knows or cares about different HS/SS signalling.

It matches the USB-C connector electrical characteristics, which by spec has, at least:
- High-Speed USB Line
- up to 4 differential high-speed lanes that can be switched to DP, USB2 or PCIe
- SideBand line (SBU)

And those 3 components can be handled by 3 different HW in the SoC, so each one has a dedicated port.

Remember DT describes the HW, not the SW implementation.

Neil

> 
> Documentation bit-rot
> 
> ---
> bod
>