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charset="utf-8" Content-Transfer-Encoding: 7bit To: Vinod Koul , Kishon Vijay Abraham I , Bjorn Andersson , Konrad Dybcio , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Dmitry Baryshkov , Johan Hovold Cc: linux-phy@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, Abel Vesa X-Mailer: b4 0.13.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2478; i=abel.vesa@linaro.org; h=from:subject:message-id; bh=O0xVY+gl/fPHcB6WhFKWsogdWZR6lFHePZT39lrEaZQ=; b=owEBbQKS/ZANAwAKARtfRMkAlRVWAcsmYgBmAHXupd+aX9jJ71rkl3EKxdf9VYRDpb/da92OQ qn8lHUFCE2JAjMEAAEKAB0WIQRO8+4RTnqPKsqn0bgbX0TJAJUVVgUCZgB17gAKCRAbX0TJAJUV VrvREACwrHiaD6PwIQtmnkqeVgB4JTXBJY1d3DFw4JlKGgOPs1vt4XIrCdM6vXnftUL4GSfCLwc muGOAhE7nPqs2eI7WGJvCUT0tu/4zmPTMm4BFJumTjPIRPLd83wRv38r/YdInH0RLvdwQpHezMB 7xPkkn0yoj5BBa05aGQH96uSDpvfpk1dcI4kQ0TkUSKzm/SvqdNN/uVEq4utV9aOWTxQCZX3dE7 j3T0GrGAI0CvsW6NC6nWYHfXa/6jgmo5Ex7EWNnqLM3umPS0mYweBQCz69lcWFzUhw/wFIWN3eL c+NBUX5hb0Tstet0/pXnRm2Rad9qAhJwE0sNRgnxf+AfrGDoiIJys0t2DKFiLmW/miG2imbv6nb pBRTZk2i4fYlmhj8TghwGDM1D9XYi3OwkmWtwqsRu8e1fbn1zAOgBYPZb9ah5sAve3njTpFOPTs skefZtRU5xXqPelVXOi05FjngLy8PsdG1Ef33nVAAjhSWiSiBNGTeL1olN2AD60iAlmektibpwo UZu1w09t6jF6t4BE6zyiwpz/fRA2aBeqQ6tLHTPIbNq9LWEoXw5PrCOEa2Jcnxjdvs4AvvrqkI1 +yqljOqtyH6L60/WHeqCyTSgy9HwvHkRuNafIAdlC4y3yw3J0b8VQz9GHDZQltUxF82J6+bYUk0 QxfmgqD8Yw/exMg== X-Developer-Key: i=abel.vesa@linaro.org; a=openpgp; fpr=6AFF162D57F4223A8770EF5AF7BF214136F41FAE Until now, all platform that supported both eDP and DP had different compatibles for each mode. Using different compatibles for basically the same IP block but for a different configuration is bad way all around. There is a new compute platform from Qualcomm that supports both eDP and DP with the same PHY. So instead of following the old method, we should allow the submode to be configured via set_mode from the controller driver. The controller part will follow after we conclude the PHY part first. Signed-off-by: Abel Vesa --- Changes in v5: - Dropped the unnecessary ternary operator. - Link to v4: https://lore.kernel.org/r/20240216-x1e80100-phy-edp-compatible-refactor-v4-0-c07fd1a52186@linaro.org Changes in v4: - Added todo comment about setting the value of cfg8 based on swing pre-emph availability, like Konrad suggested - Fixed the condition in qcom_edp_phy_power_on, reported by Dmitry - Link to v3: https://lore.kernel.org/r/20240129-x1e80100-phy-edp-compatible-refactor-v3-0-e71f3359c535@linaro.org Changes in v3: - Dropped needs_swing_pre_emph_cfg as we store the table instead - Picking the table based on is_edp instead of overriding. - Link to v2: https://lore.kernel.org/r/20231222-x1e80100-phy-edp-compatible-refactor-v2-0-ab5786c2359f@linaro.org Changes in v2: - Dropped the dedicated xlate function and added set_mode op instead - Dropped the eDP PHY type and mode addition - Added the DP PHY submodes (eDP and DP) - Removed the device match data storing from the container struct - Link to v1: https://lore.kernel.org/r/20231219-x1e80100-phy-edp-compatible-refactor-v1-0-f9e77752953d@linaro.org Initial attepmpt was here: https://lore.kernel.org/all/20231122-phy-qualcomm-edp-x1e80100-v3-3-576fc4e9559d@linaro.org/ Compared to that version, this one uses the phy-cells method and drops the X1E80100 support. The X1E80100 support will be a separate patchset. --- Abel Vesa (2): phy: Add Embedded DisplayPort and DisplayPort submodes phy: qcom: edp: Add set_mode op for configuring eDP/DP submode drivers/phy/qualcomm/phy-qcom-edp.c | 76 +++++++++++++++++++++++++++---------- include/linux/phy/phy-dp.h | 3 ++ 2 files changed, 59 insertions(+), 20 deletions(-) --- base-commit: 2d5c7b7eb345249cb34d42cbc2b97b4c57ea944e change-id: 20231219-x1e80100-phy-edp-compatible-refactor-8733eca7ccda Best regards, -- Abel Vesa