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[209.132.180.67]) by mx.google.com with ESMTP id p91si1618010plb.301.2017.10.12.04.06.09; Thu, 12 Oct 2017 04:06:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753417AbdJLLFp (ORCPT + 99 others); Thu, 12 Oct 2017 07:05:45 -0400 Received: from foss.arm.com ([217.140.101.70]:44356 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751418AbdJLLFo (ORCPT ); Thu, 12 Oct 2017 07:05:44 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id CD89C1435; Thu, 12 Oct 2017 04:05:43 -0700 (PDT) Received: from red-moon (red-moon.cambridge.arm.com [10.1.206.55]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 96FD33F599; Thu, 12 Oct 2017 04:05:41 -0700 (PDT) Date: Thu, 12 Oct 2017 12:05:38 +0100 From: Lorenzo Pieralisi To: Hanjun Guo Cc: "Leeder, Neil" , Hanjun Guo , Will Deacon , Mark Rutland , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Mark Langsdorf , Mark Salter , Jon Masters , Timur Tabi , Mark Brown , Robin Murphy Subject: Re: [PATCH 0/2] arm64 SMMUv3 PMU driver with IORT support Message-ID: <20171012110538.GA8509@red-moon> References: <1501876754-1064-1-git-send-email-nleeder@codeaurora.org> <394bd3b8-2583-01fa-02d3-6a49c2a6a6c0@linaro.org> <3eac1295-dba2-ad79-d868-b538b13de91a@codeaurora.org> <67a696ad-98e9-d505-1d73-7246d2efc398@codeaurora.org> <59DF4AD9.2060903@huawei.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <59DF4AD9.2060903@huawei.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 12, 2017 at 06:58:33PM +0800, Hanjun Guo wrote: > On 2017/8/11 11:28, Leeder, Neil wrote: > > On 8/9/2017 9:26 PM, Hanjun Guo wrote: > >> > On 2017/8/9 23:48, Leeder, Neil wrote: > >>>>> >>>> drivers/perf/Kconfig | 9 + > >>>>> >>>> drivers/perf/Makefile | 1 + > >>>>> >>>> drivers/perf/arm_smmuv3_pmu.c | 823 ++++++++++++++++++++++++++++++++++++++++++ > >>>>> >>>> include/acpi/actbl2.h | 9 +- > >>>> >>> Do you have the acpica support code? I'm currently > >>>> >>> working on SMMUv3 MSI support and I would like to test > >>>> >>> it with MSI support for PMCG as well. > >>> >> I don't have any code other than what was posted here. > >>> >> What additional ACPICA support code is needed? > >> > > >> > Sorry for not clear, I mean the acpica code for iASL and > >> > other tool: github.com/acpica/acpica.git > >> > > >> > With that code, I can compile my IORT table with PMCG node. > > Unfortunately it looks like I'm the first person from Qualcomm Datacenter > > Technologies to try to add something to ACPICA, which means I'll have to > > kick off an internal legal process which may take some time. Unless someone > > else wants to take a crack at it - and really, there's nothing more than is > > in the ARM IORT spec - it could be a while before I can do that. > > Just a update, I sent a pull request to Bob for ACPICA changes, > please take a look: > > https://github.com/acpica/acpica/pull/327 You should not have done that. We need to update IORT specifications for IORT PMCG before merging ACPICA PMCG support. Ask Robert to drop it straight away or I will. Lorenzo From 1581049228599645079@xxx Thu Oct 12 11:00:42 +0000 2017 X-GM-THRID: 1574831973672201036 X-Gmail-Labels: Inbox,Category Forums