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[209.132.180.67]) by mx.google.com with ESMTP id q10si10294986pge.349.2017.11.21.01.12.42; Tue, 21 Nov 2017 01:12:53 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=h19stTWs; dkim=pass header.i=@codeaurora.org header.s=default header.b=LY6jydtW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751434AbdKUJLz (ORCPT + 72 others); Tue, 21 Nov 2017 04:11:55 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:33710 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751223AbdKUJLw (ORCPT ); Tue, 21 Nov 2017 04:11:52 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id A1D566080B; Tue, 21 Nov 2017 09:11:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511255511; bh=ZKMcW00zQ/7NDM9aHOUaVdybu2IbllPBKYIDvjf7EKk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h19stTWsiYQFU4bCETfBg5bn4b2gl8BHVSS2XIRpDGXvX+IsCy7mZa/HmKxnwUgaw x1ZMVC191PDcf2Wh7qlnS6zY4J9o7lRdaKeFD2BAh5+y3lkZe7PjsGksr8imjCyzXY odQpmoky3OiT2rD5yQi4bpIky/FthvDGF3Yi8yvA= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from tirupath-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tirupath@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 84E9660351; Tue, 21 Nov 2017 09:11:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511255510; bh=ZKMcW00zQ/7NDM9aHOUaVdybu2IbllPBKYIDvjf7EKk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LY6jydtWn60KRT6yujv5v/6u1lZtzy8D/nG2kx5coCg9aSdDnQrUkH3eihYfabFBR i2YwgpCSpvwh7qz1D7vaGrhqXF72Mkkx2UNWQuCSvDzGCGr6AdjWhJ2v8aVbHr3fzL cP4IKyKQj7CMqypPgzhqGqekHZGuJE+C6zBjjr40= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 84E9660351 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=tirupath@codeaurora.org From: Tirupathi Reddy To: sboyd@codeaurora.org, robh+dt@kernel.org Cc: mturquette@baylibre.com, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Tirupathi Reddy Subject: [PATCH V7 2/2] dt-bindings: Add qcom spmi_pmic clock divider bindings Date: Tue, 21 Nov 2017 14:41:05 +0530 Message-Id: <1511255465-3984-3-git-send-email-tirupath@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511255465-3984-1-git-send-email-tirupath@codeaurora.org> References: <1511255465-3984-1-git-send-email-tirupath@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch adds device tree bindings for Qualcomm SPMI PMIC clock divider module. Signed-off-by: Tirupathi Reddy --- .../bindings/clock/qcom,spmi-pmic-div.txt | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/qcom,spmi-pmic-div.txt diff --git a/Documentation/devicetree/bindings/clock/qcom,spmi-pmic-div.txt b/Documentation/devicetree/bindings/clock/qcom,spmi-pmic-div.txt new file mode 100644 index 0000000..2cf2aba --- /dev/null +++ b/Documentation/devicetree/bindings/clock/qcom,spmi-pmic-div.txt @@ -0,0 +1,59 @@ +Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv) + +clkdiv configures the clock frequency of a set of outputs on the PMIC. +These clocks are typically wired through alternate functions on +gpio pins. + +======================= +Properties +======================= + +- compatible + Usage: required + Value type: + Definition: must be "qcom,spmi-clkdiv". + +- reg + Usage: required + Value type: + Definition: base address of CLKDIV peripherals. + +- qcom,num-clkdivs + Usage: required + Value type: + Definition: number of CLKDIV peripherals. + +- clocks: + Usage: required + Value type: + Definition: reference to the xo clock. + +- clock-names: + Usage: required + Value type: + Definition: must be "xo". + +- clock-cells: + Usage: required + Value type: + Definition: shall contain 1. + +======= +Example +======= + +pm8998_clk_divs: clock-controller@5b00 { + compatible = "qcom,spmi-clkdiv"; + reg = <0x5b00>; + #clock-cells = <1>; + qcom,num-clkdivs = <3>; + clocks = <&xo_board>; + clock-names = "xo"; + + assigned-clocks = <&pm8998_clk_divs 1>, + <&pm8998_clk_divs 2>, + <&pm8998_clk_divs 3>; + assigned-clock-rates = <9600000>, + <9600000>, + <9600000>; +}; -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation From 1586521222325046107@xxx Mon Dec 11 20:35:42 +0000 2017 X-GM-THRID: 1586521222325046107 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread