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[209.132.180.67]) by mx.google.com with ESMTP id 94si7300018plb.652.2017.11.27.04.57.26; Mon, 27 Nov 2017 04:57:38 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=ZbG2e5V4; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752982AbdK0M4W (ORCPT + 77 others); Mon, 27 Nov 2017 07:56:22 -0500 Received: from mail-pg0-f66.google.com ([74.125.83.66]:44465 "EHLO mail-pg0-f66.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752060AbdK0MzX (ORCPT ); Mon, 27 Nov 2017 07:55:23 -0500 Received: by mail-pg0-f66.google.com with SMTP id c123so18641495pga.11; Mon, 27 Nov 2017 04:55:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=jaoaWMQS9b2oJVO0aIU44oaysUHiWvyJOSJvrlucOMQ=; b=ZbG2e5V4MwhpGCfcXNnP1ecxChdqq+F2GrQW0snbEEPxGn52JsZEP8Q2LhGhhhf3LB JDdexEchFtj4iQ38o9QCQ3/yfHyoJauSPB4U2CPrIQ/3qt/0qehBlXyz3+YmhpZu8X0K viIBNkgTJBjDLgkcSODWp1AhAWabW2gZIaO3yvaS+1bDFottWEJH6TYf2/kCesgX1mHc PJN0qpDbSJlxXVP0OCvAPW/PUd3+Byi5lFVPASVFsdl+pYnxXedl1Tf9UmB19sfYSH9r r1tKkyJ/rxBQUmSUB/RxqVEMyDvkQdvVCs2XXhyzASxtGOeIsvmSlehcUtMREFVYbGwW AJcQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=jaoaWMQS9b2oJVO0aIU44oaysUHiWvyJOSJvrlucOMQ=; b=TbOhFLk70MRV+bHEAI6UhXPdAgkkUm/pdpAIceJG/LT8Y8vpKxwRoAOh6lJJKtH4kS VK4YeZ/FJCigngTAwVcM2XJyvXPyP/1kDuXXPMAO4uPowpTnbJeNNFTbtREPJLKf2oKA 3aftQPk0cTBIL3VyKRuLYBQoBxZCTRo1xk/LlRlyoRy4keglpJ9a9l1c9uQad3oAueEt i7jt1pvz5Rhl2LwELtAXZKFTktPh0piTXfv7dQhtPc/CZmUesdzrc0O9qOP4uJgXpgiQ luvFe2U6aVx5Iyt7evnu1dOBx460o4PY6gyED0dReswJC7Bu+LHTo1oUxPV+/0NjyeIh ZnRQ== X-Gm-Message-State: AJaThX6BXLk1nNQv8AvS1e4IMzcb7+UJbmWKgR8vGE6nBHg223b+kXpN b3RU/yKBZWCFaJHOnCCEp+s= X-Received: by 10.101.101.217 with SMTP id y25mr569446pgv.360.1511787323156; Mon, 27 Nov 2017 04:55:23 -0800 (PST) Received: from app09.andestech.com ([118.163.51.199]) by smtp.gmail.com with ESMTPSA id w64sm55225459pfj.62.2017.11.27.04.55.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 04:55:22 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org Cc: Rick Chen , green.hu@gmail.com Subject: [PATCH v2 34/35] clocksource/drivers/Kconfig: Support andestech atcpit100 timer Date: Mon, 27 Nov 2017 20:28:21 +0800 Message-Id: <1a22db002413ff60851737736a86b40c38877220.1511785528.git.green.hu@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Rick Chen Add CLKSRC_ATCPIT100 for Andestech atcpit100 timer selection. It often be used in Andestech AE3XX platform. Signed-off-by: Rick Chen Signed-off-by: Greentime Hu --- drivers/clocksource/Kconfig | 6 ++++++ drivers/clocksource/Makefile | 1 + 2 files changed, 7 insertions(+) diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index cc60620..591362a 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -615,4 +615,10 @@ config CLKSRC_ST_LPC Enable this option to use the Low Power controller timer as clocksource. +config CLKSRC_ATCPIT100 + bool "Clocksource for AE3XX platform" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS && HAS_IOMEM + help + This option enables support for the Andestech AE3XX platform timers. + endmenu diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 72711f1..7d072f5 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -75,3 +75,4 @@ obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o obj-$(CONFIG_H8300_TPU) += h8300_tpu.o obj-$(CONFIG_CLKSRC_ST_LPC) += clksrc_st_lpc.o obj-$(CONFIG_X86_NUMACHIP) += numachip.o +obj-$(CONFIG_CLKSRC_ATCPIT100) += timer-atcpit100.o -- 1.7.9.5 From 1587146515177112005@xxx Mon Dec 18 18:14:27 +0000 2017 X-GM-THRID: 1586573907076138983 X-Gmail-Labels: Inbox,Category Forums