Received: by 10.223.164.202 with SMTP id h10csp2100254wrb; Thu, 16 Nov 2017 09:21:10 -0800 (PST) X-Google-Smtp-Source: AGs4zMbdbLF6Shmz0WocIQzXB0eaepkk2acFL1R71f4K5Utv6EKKMZsRvLWLZ/t6om0DJHIKnoxo X-Received: by 10.101.67.66 with SMTP id k2mr2321368pgq.20.1510852869916; Thu, 16 Nov 2017 09:21:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1510852869; cv=none; d=google.com; s=arc-20160816; b=NL2LiYOaBTgR3bNXHcVmdBWZWb1xolhepN3FOBe4fwGa//ECcvG53dIr7Y1ES8Ea05 gH3bUIdlunVDSe9Qu2ARZvW48ySJvTLDYyu5/e70C1FsqS89LCrrhUDHhbC3RaW7DoqU U/frbJyRyVBUfywTt9jcy6xUHd3K5Y8C9Nn7P09w9VwbO8dpSmCatOVGZDUX74TR8IhP kzfKb7zi2LjdrkT2VEQvZG02U3Hm/Omni2II7EVR5PWIAlNlb/vMeh61CzmNhEX+ydbj yLRQ9eH5z7xe6/9FWWNCfLcOurrBNVYJHV8uwVF20qbvTKwu9GYY44hq47mF3EIOcxb+ PbGQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:in-reply-to :mime-version:user-agent:date:message-id:from:references:cc:to :subject:arc-authentication-results; bh=W3J9x+3SPCXXLv/jIiC7Rd8ATM690glzzVV49dHV0o4=; b=nbMgrM2y7MqSrW3PHA0zqrsJE610ltC9uVRCXueg3FNHfuZkQ4GYCqH4rYsf8dHfOg qIZCfsBGE2E2h6PzlOZld92F0mY7Q5jpQzi1/tzivKkuCQxBcJIoZaIgcWNIEWV0Gd6k 7N4cXYe0o8LoV0zXvCkcQ+r6QqO+tf2wyRhkAn/MhqVaTpukcDIk+37pKpsn+sEIAI9J SO5UbfG7cgFSvPcXiHrN0Ygkf5q652b6BCvlPY7ZVr/72jgyR+9lt3huzcdAhgXGY/hW mqFgoyOqi6W7QmTwRePUwM9VYxwbevrOSR08h9czfRY+gq9swVyS8068KL7uazT7Rjtp uTrw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j1si1162336pgc.771.2017.11.16.09.20.56; Thu, 16 Nov 2017 09:21:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964960AbdKPQ0x (ORCPT + 91 others); Thu, 16 Nov 2017 11:26:53 -0500 Received: from us-smtp-delivery-107.mimecast.com ([63.128.21.107]:46597 "EHLO us-smtp-delivery-107.mimecast.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S965014AbdKPQ0m (ORCPT ); Thu, 16 Nov 2017 11:26:42 -0500 Received: from CPH-EX1.SDESIGNS.COM (195-215-56-170-static.dk.customer.tdc.net [195.215.56.170]) (Using TLS) by us-smtp-1.mimecast.com with ESMTP id us-mta-40-7hq1twFEMJ6bEgCDUtgW3A-1; Thu, 16 Nov 2017 11:26:39 -0500 X-MC-Unique: 7hq1twFEMJ6bEgCDUtgW3A-1 Received: from [172.27.0.114] (172.27.0.114) by CPH-EX1.sdesigns.com (192.168.10.36) with Microsoft SMTP Server (TLS) id 14.3.294.0; Thu, 16 Nov 2017 17:26:34 +0100 Subject: Re: [RFC] Improving udelay/ndelay on platforms where that is possible To: Nicolas Pitre CC: Russell King - ARM Linux , Linus Torvalds , Alan Cox , LKML , Linux ARM , Steven Rostedt , Ingo Molnar , Thomas Gleixner , Peter Zijlstra , John Stultz , Douglas Anderson , Mark Rutland , Will Deacon , Jonathan Austin , Arnd Bergmann , Kevin Hilman , Michael Turquette , Stephen Boyd , Boris Brezillon , Thibaud Cornic , Mason References: <20171101175325.2557ce85@alans-desktop> <4b707ce0-6067-ab36-e167-1acf348d26bf@free.fr> <11393e07-b042-180c-3bcd-484bf51eada6@sigmadesigns.com> <20171115131351.GE31757@n2100.armlinux.org.uk> <1fa81694-7bd2-564b-e5b9-ae53b9ea6620@sigmadesigns.com> <20171116153625.GJ31757@n2100.armlinux.org.uk> <9a4cfa9d-3940-b7f2-5a4d-59e89af85bb7@sigmadesigns.com> From: Marc Gonzalez Message-ID: <48c38055-20f7-e565-aa56-74f360e6e3d9@sigmadesigns.com> Date: Thu, 16 Nov 2017 17:26:32 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Firefox/52.0 SeaMonkey/2.49.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: 7bit X-Originating-IP: [172.27.0.114] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 16/11/2017 17:08, Nicolas Pitre wrote: > On Thu, 16 Nov 2017, Marc Gonzalez wrote: > >> On 16/11/2017 16:36, Russell King - ARM Linux wrote: >>> On Thu, Nov 16, 2017 at 04:26:51PM +0100, Marc Gonzalez wrote: >>>> On 15/11/2017 14:13, Russell King - ARM Linux wrote: >>>> >>>>> udelay() needs to offer a consistent interface so that drivers know >>>>> what to expect no matter what the implementation is. Making one >>>>> implementation conform to your ideas while leaving the other >>>>> implementations with other expectations is a recipe for bugs. >>>>> >>>>> If you really want to do this, fix the loops_per_jiffy implementation >>>>> as well so that the consistency is maintained. >>>> >>>> Hello Russell, >>>> >>>> It seems to me that, when using DFS, there's a serious issue with loop-based >>>> delays. (IIRC, it was you who pointed this out a few years ago.) >>>> >>>> If I'm reading arch/arm/kernel/smp.c correctly, loops_per_jiffy is scaled >>>> when the frequency changes. >>>> >>>> But arch/arm/lib/delay-loop.S starts by loading the current value of >>>> loops_per_jiffy, computes the number of times to loop, and then loops. >>>> If the frequency increases when the core is in __loop_delay, the >>>> delay will be much shorter than requested. >>>> >>>> Is this a correct assessment of the situation? >>> >>> Absolutely correct, and it's something that people are aware of, and >>> have already catered for while writing their drivers. >> >> In their cpufreq driver? >> In "real" device drivers that happen to use delays? >> >> On my system, the CPU frequency may ramp up from 120 MHz to 1.2 GHz. >> If the frequency increases at the beginning of __loop_delay, udelay(100) >> would spin only 10 microseconds. This is likely to cause issues in >> any driver using udelay. >> >> How does one cater for that? > > You make sure your delays are based on a stable hardware timer. > Most platforms nowadays should have a suitable timer source. So you propose fixing loop-based delays by using clock-based delays, is that correct? (That is indeed what I did on my platform.) Russell stated that there are platforms using loop-based delays with cpufreq enabled. I'm asking how they manage the brokenness. Regards. From 1584243102800735893@xxx Thu Nov 16 17:05:58 +0000 2017 X-GM-THRID: 1582790467810046578 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread