Received: by 10.223.164.202 with SMTP id h10csp662213wrb; Thu, 30 Nov 2017 17:21:50 -0800 (PST) X-Google-Smtp-Source: AGs4zMZeUIf7jTBpO84vcheoE0AeycGOvAFBHooGM9WrwEBQEgOHhZeGFii00amRVmPE4eUS+a1t X-Received: by 10.84.194.228 with SMTP id h91mr4391932pld.177.1512091310695; Thu, 30 Nov 2017 17:21:50 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1512091310; cv=none; d=google.com; s=arc-20160816; b=JC3trxWBSJIWbF88jQ7tb6lGPVk8oha8MiqQYoSNz9rYo6LhHXtQzwD00O6USk0vCx HIHCyXGG/wbVNQBSLlJfzWz0k1zeaAh5ExGNvLFNWNneYSbg/u1GbpJVvWrM4Va+Eqk+ D8AQ3KvnUeMhVTloY97qWFy/vPK3wI/ML4XL5/Yp7YplWLLpqiKBqP1VeQBWOZfWd7su YJIFdQyZbraxXAhn4qWCkup4aeDvL/6Bk9tXs+kNgqFOi1Oqix0t6jO3X49VhawIOlPO C7JAwQmS+qlchtm7e52RSnxsZv4CghEsSVg3oPSQAasq50PLXjBggNjNuhvbXec4mgHY ig4g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:cc:to:subject:message-id:date:from :references:in-reply-to:mime-version:dkim-signature:dkim-signature :arc-authentication-results; bh=Naj05MYdi90WSN9rvGibqtT84uktsE8cAfDs4nj90CE=; b=M+MkfKgaLI6uf2vmtidCnWUFd69eWB/kqokalMlIro69m97qgiWpwwg0JgtBSQ1Ff5 L8Vl0ctUG4eITIXkTjniL7hcgZVbpBGYObgiGETrZ0VhuihUaFcPvXe30PgnTHFk7GiE D8FlifkjVhFJT4pJIHxY4bPLMxk2N5jSgeVA62bJM4d83UUhtDIJ24oeGoyJp5sBjY+X 8iMwweUWwvYC1ShJKVrw/6TO2Rt+u9AAy/2EilTDT9qxX00GMpxdzbZhGMeUF/RqKdRR v6MXUcbIHBQiJrwJblsImIWUEYH4rXdl2AVP8C+uYswiS9GVYLoTCTpUkfPa/f1R+TpX IfXQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@google.com header.s=20161025 header.b=Ghb4Lu/n; dkim=fail header.i=@chromium.org header.s=google header.b=FXaVimux; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=chromium.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id a6si3892625pgd.708.2017.11.30.17.21.36; Thu, 30 Nov 2017 17:21:50 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@google.com header.s=20161025 header.b=Ghb4Lu/n; dkim=fail header.i=@chromium.org header.s=google header.b=FXaVimux; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=chromium.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751964AbdLABVZ (ORCPT + 99 others); Thu, 30 Nov 2017 20:21:25 -0500 Received: from mail-wr0-f181.google.com ([209.85.128.181]:39312 "EHLO mail-wr0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751842AbdLABVX (ORCPT ); Thu, 30 Nov 2017 20:21:23 -0500 Received: by mail-wr0-f181.google.com with SMTP id a41so6581140wra.6 for ; Thu, 30 Nov 2017 17:21:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=Naj05MYdi90WSN9rvGibqtT84uktsE8cAfDs4nj90CE=; b=Ghb4Lu/n9awD073RZdks6LXpOsnIlKVFpLnlV+bZipCakJWCYNLmkucUUSIV1oWzvm Cl5QllxLv0VXMA0LyvCiaQ+Vtg1lky2+tchcFM0mZcKOtpi4Fuj24fL0H+VMi+DZZnk6 HUbJ16zC4IHl9RWjJeP+RCIfhDQyDQQpTZhdjNW73nChoaUrEVMwr6WjwzDXxuqoaKhH gRd0NuQ3W5GZcT87S9NOT5ViVPJoYNBg6gHwTMEchl18N0lVMfd4Nj1qtEuLvs17odp4 +lpPfsu84Oj/rGC1ksndlA2Qarnx2V25+KjRI+Tvd/IRptL+teJ0Y4GAq3ehw9DYTIfO ACYQ== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc; bh=Naj05MYdi90WSN9rvGibqtT84uktsE8cAfDs4nj90CE=; b=FXaVimux2xYdwNymj2asAZq1qSqk2fmdUdhC5jdP8/Jhecn224YqrjwVvvhSyCh9xq qcRiiT8RnI4uwXz0y4A6YWOT5K2dLBIrwyCRXqL3byLmXSXWCTq5C32KmsesUmxJvRei JcB9Eh35QopwzCHSE4f9ST2k3nii74wGJCuAU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc; bh=Naj05MYdi90WSN9rvGibqtT84uktsE8cAfDs4nj90CE=; b=ERfayTfYYTKBCN6q1ae1uD3pPmanovbYsQmB4sTE4WvA0dMbtfX4fUwudchKKNt3sc Hrtv0Pp1SfTThVKoS1bMw5rkIur9ZeGraSYBnqWHyoYcGG+EI5LDaIuzde8jzUXy/xlc QLS5zgdunNtwwTqaNI8eyBD3NP914hRWYUdAcQyElVI/cURsbvM7JPwXBjbQoP0nsXLX HumY6fRKD+FMqAzzN7Yrxm4Vrekj+ABtt5M4RTnzSnopX21H914cXhaQeloykphnw89R pwijM05cmMeySvG8B0P8MHl7Wd1nfHdiO/KSE4FOUNNYmJJKGkWg79tLXQNz8aX/z9ZM tJeg== X-Gm-Message-State: AJaThX74XYYKaD63smHNlQQlblKn1UzQ2IAbdPvuYtUqQ2g4vKhMoOne 55BX3bqFtYOqjFcXXjrPAVGpGotdH03lxnoywC8NSQ== X-Received: by 10.223.186.81 with SMTP id t17mr3438604wrg.275.1512091281624; Thu, 30 Nov 2017 17:21:21 -0800 (PST) MIME-Version: 1.0 Received: by 10.28.138.196 with HTTP; Thu, 30 Nov 2017 17:21:20 -0800 (PST) In-Reply-To: <86d140xfr9.fsf@unassigned-hostname.unassigned-domain> References: <86d140xfr9.fsf@unassigned-hostname.unassigned-domain> From: "dbasehore ." Date: Thu, 30 Nov 2017 17:21:20 -0800 X-Google-Sender-Auth: MoQ83RYE-5LPMZJhfMLkrM8mwnU Message-ID: Subject: Re: Save and Restore Generic Interrupt Controller for System Sleep on ARM To: Marc Zyngier Cc: linux-kernel , Thomas Gleixner , sudeep.holla@arm.com, Linux-pm mailing list Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Nov 30, 2017 at 1:44 AM, Marc Zyngier wrote: > On Wed, Nov 29 2017 at 2:49:18 pm GMT, "dbasehore ." wrote: >> There was some work in ARM Trusted Firmware to support saving and >> restoring the Generic Interrupt Controller (GICv3) before and after >> sleep, but it seems that the plan is to have this all in the kernel >> now. The point of doing this is to save power during sleep. On an >> RK3399 system, we save about 15mW by disabling the power rail that the >> GIC is on. >> >> I was looking for whether anyone had anything in progress already or >> for preferences on how to do this. Marc suggested using a device tree >> entry to indicate the need to save and restore the GIC. There is >> another requirement to resend MAPC commands on certain implementations >> of the GICv3 which could be indicated by another device tree entry. > > Let's be precise: This is a GIC-500 requirement, and not something that > the GICv3 architecture defines (PM is *not* part of the GICv3 > architecture). > Just to double check, do the register restores apply to all GICv3 designs? If so, I can put that code in the gic-v3 code instead of breaking it out. >> If someone does have patches, I'll be able to test and verify them on >> my system since we've gotten things working with the ARM Trusted >> Firmware patches. > > I'm not aware of any such patch that has been posted for mainline, so > just post whatever you have and we'll take it from there. > > IT is hard to comment further on what you're trying to do without seeing > the code and a description of the new API between ATF and the kernel. > > Thanks, > > M. > -- > Jazz is not dead, it just smell funny. From 1585483778942057792@xxx Thu Nov 30 09:45:59 +0000 2017 X-GM-THRID: 1585442540363716740 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread