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Date:   Sat, 25 Nov 2017 17:02:33 +0100
From:   Maxime Ripard <maxime.ripard@free-electrons.com>
To:     Yong <yong.deng@magewell.com>
Cc:     Mauro Carvalho Chehab <mchehab@kernel.org>,
        Rob Herring <robh+dt@kernel.org>,
        Mark Rutland <mark.rutland@arm.com>,
        Chen-Yu Tsai <wens@csie.org>,
        Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
        "David S. Miller" <davem@davemloft.net>,
        Hans Verkuil <hverkuil@xs4all.nl>,
        Arnd Bergmann <arnd@arndb.de>,
        Hugues Fruchet <hugues.fruchet@st.com>,
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        Benoit Parrot <bparrot@ti.com>,
        Benjamin Gaignard <benjamin.gaignard@linaro.org>,
        Jean-Christophe Trotin <jean-christophe.trotin@st.com>,
        Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com>,
        Minghsiu Tsai <minghsiu.tsai@mediatek.com>,
        Krzysztof Kozlowski <krzk@kernel.org>,
        Robert Jarzmik <robert.jarzmik@free.fr>,
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        linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org,
        linux-sunxi@googlegroups.com
Subject: Re: [PATCH v2 1/3] media: V3s: Add support for Allwinner CSI.
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On Thu, Nov 23, 2017 at 09:14:44AM +0800, Yong wrote:
> > On Wed, Nov 22, 2017 at 09:33:06AM +0800, Yong wrote:
> > > > On Thu, Jul 27, 2017 at 01:01:35PM +0800, Yong Deng wrote:
> > > > > Allwinner V3s SoC have two CSI module. CSI0 is used for MIPI inte=
rface
> > > > > and CSI1 is used for parallel interface. This is not documented in
> > > > > datasheet but by testing and guess.
> > > > >=20
> > > > > This patch implement a v4l2 framework driver for it.
> > > > >=20
> > > > > Currently, the driver only support the parallel interface. MIPI-C=
SI2,
> > > > > ISP's support are not included in this patch.
> > > > >=20
> > > > > Signed-off-by: Yong Deng <yong.deng@magewell.com>
> > > >=20
> > > > Thanks again for this driver.
> > > >=20
> > > > It seems like at least this iteration is behaving in a weird way wi=
th
> > > > DMA transfers for at least YU12 and NV12 (and I would assume YV12).
> > > >=20
> > > > Starting a transfer of multiple frames in either of these formats,
> > > > using either ffmpeg (ffmpeg -f v4l2 -video_size 640x480 -framerate =
30
> > > > -i /dev/video0 output.mkv) or yavta (yavta -c80 -p -F --skip 0 -f N=
V12
> > > > -s 640x480 $(media-c tl -e 'sun6i-csi')) will end up in a panic.
> > > >=20
> > > > The panic seems to be generated with random data going into parts of
> > > > the kernel memory, the pattern being in my case something like
> > > > 0x8287868a which is very odd (always around 0x88)
> > > >=20
> > > > It turns out that when you cover the sensor, the values change to
> > > > around 0x28, so it really seems like it's pixels that have been cop=
ied
> > > > there.
> > > >=20
> > > > I've looked quickly at the DMA setup, and it seems reasonable to
> > > > me. Do you have the same issue on your side? Have you been able to
> > > > test those formats using your hardware?
> > >=20
> > > I had tested the following formats with BT1120 input:
> > > V4L2_PIX_FMT_NV12		-> NV12
> > > V4L2_PIX_FMT_NV21		-> NV21
> > > V4L2_PIX_FMT_NV16		-> NV16
> > > V4L2_PIX_FMT_NV61		-> NV61
> > > V4L2_PIX_FMT_YUV420		-> YU12
> > > V4L2_PIX_FMT_YVU420		-> YV12
> > > V4L2_PIX_FMT_YUV422P		-> 422P
> > > And they all work fine.
> >=20
> > Ok, that's good to know.
> >=20
> > > > Given that they all are planar formats and YUYV and the likes work
> > > > just fine, maybe we can leave them aside for now?
> > >=20
> > > V4L2_PIX_FMT_YUV422P and V4L2_PIX_FMT_YUYV is OK, and V4L2_PIX_FMT_NV=
12
> > > is bad? It's really weird.
> > >=20
> > > What's your input bus code format, type and width?
> >=20
> > The sensor is an ov5640, so the MBUS code for the bus is
> > MEDIA_BUS_FMT_YUYV8_2X8.
>=20
> Did you test on V3s?

No, this is on an H3, but that would be the first difference so far.

> I haven't tested it with MEDIA_BUS_FMT_YUYV8_2X8.

Ok, it's good to know that at least it works on your end, it's useful
for us to debug things :)

> The Allwinner CSI's DMA is definitely weird. Ond=C5=99ej Jirman thought
> that CSI has an internal queue (Ond=C5=99ej's commit has explained in det=
ail).
> I think CSI just pick up the buffer address before the frame done=20
> interrupt triggered.=20
> The patch in attachment can deal with this. You can see if it is
> useful to solve your problem.

I'll test that on monday, thanks!

Maxime

--=20
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

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