Return-Path: Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758110AbYAKGRS (ORCPT ); Fri, 11 Jan 2008 01:17:18 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S1751305AbYAKGRF (ORCPT ); Fri, 11 Jan 2008 01:17:05 -0500 Received: from py-out-1112.google.com ([64.233.166.181]:19871 "EHLO py-out-1112.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751270AbYAKGRC (ORCPT ); Fri, 11 Jan 2008 01:17:02 -0500 DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=message-id:date:from:to:subject:cc:in-reply-to:mime-version:content-type:content-transfer-encoding:content-disposition:references; b=jbeM2YnJdy/OgMpmCHgEzvU65VPRyfBG27uVTmlGzK+vG25mKMFHGAP7lhQNuzKTn3tDjTgP4GtCyCX8PJ8gQB4s0fnq5kurKcjZDCIXnnjOi0mPy3AmFN/sL6++n/M8JM0M7QoCQxpUn/+ngYgWX+yoefyFuA1i/La8Fg2Ubu0= Message-ID: <386072610801102217u1739d7d7v497e73a38aa876c2@mail.gmail.com> Date: Fri, 11 Jan 2008 14:17:01 +0800 From: "Bryan Wu" To: "Pierre Ossman" Subject: Re: [patch] split MMC_CAP_4_BIT_DATA Cc: "Cai, Cliff" , "Mike Frysinger" , linux-kernel@vger.kernel.org In-Reply-To: <20080110125748.416ad0c5@poseidon.drzeus.cx> MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <386072610801081832w2befcbafwe9215067f022ed5d@mail.gmail.com> <0F1B54C89D5F954D8535DB252AF412FA014FAD4A@chinexm1.ad.analog.com> <20080109082325.212ec90d@poseidon.drzeus.cx> <386072610801090845r14510fb8tbcca76d605458a96@mail.gmail.com> <20080110095428.3b93fd18@poseidon.drzeus.cx> <386072610801100122n52339488ke2b8724c390be765@mail.gmail.com> <20080110125748.416ad0c5@poseidon.drzeus.cx> Sender: linux-kernel-owner@vger.kernel.org List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Content-Length: 1871 Lines: 43 On Jan 10, 2008 7:57 PM, Pierre Ossman wrote: > On Thu, 10 Jan 2008 17:22:55 +0800 > "Bryan Wu" wrote: > > > > > At page 4-3 of ADSP-BF54x Blackfin(R) Processor Peripheral Hardware > > Reference, there is a table which guide us the SDH controller does not > > support 4-bit mode MMC card. Please found the table picture in the > > attachment or get the document at: > > http://www.analog.com/UploadedFiles/Associated_Docs/61460151169789ADSP_BF54x_Blackfin_Processor_Peripheral_Hardware_Reference.pdf > > > > Ok, but this just means the controller wasn't designed with 4-bit MMC in mind. As several other "SD-only" controller have been tested with modern MMC cards without a problem, this is not sufficient to explain any problem. > This should be some HW design issue and BF54x including SDH controller is in mass production. There is no chance to change the silicon, we just wanna use software driver to workaround this issue. So Mike's patch is here. > > > > Thanks, actually we are not yet convinced by our hardware designer > > why BF54x SDH does not support 4-bit MMC. > > > > Please keep me informed on how it progresses. I'd like an at least plausible explanation, preferably also some empirical data, before I'm ready to accept Mike's patch. > We were told this is an hardware design issue, so please help us to workaround it in software side with Mike's patch. And how do you think my suggestion to Mike's patch, #define MMC_CAP_4_BIT_DATA ( MMC_CAP_SD_4_BIT_DATA | MMC_CAP_MMC_4_BIT_DATA) Then no need to change other MMC host drivers Thanks Regards, -Bryan Wu -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/