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[209.132.180.67]) by mx.google.com with ESMTP id f12si24059473plo.19.2017.11.27.16.30.35; Mon, 27 Nov 2017 16:30:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=gNPGmXbH; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753406AbdK1A3z (ORCPT + 78 others); Mon, 27 Nov 2017 19:29:55 -0500 Received: from mail-io0-f196.google.com ([209.85.223.196]:33787 "EHLO mail-io0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753351AbdK1A3u (ORCPT ); Mon, 27 Nov 2017 19:29:50 -0500 Received: by mail-io0-f196.google.com with SMTP id i184so30994223ioa.0; Mon, 27 Nov 2017 16:29:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=4aSw1ivdPMpOK7KZaAsy5z/4AL77f49v5pu2bSxpw3M=; b=gNPGmXbHGavLHjIekOvOyq0NgHgBCSHO/FlFXpfVUR4XRyPGVSRs2Yck1vMnd7rKlm iptW/UqvuULK/FcjWMX+ACPh3s78WsFinFBCVq+fleGbaxjF/fwY4BcXFGguGqdqkQMJ F9KHPnk7c0qdxF/+D/cUYKfqgVcKOC5x0sU4uhuKqcmmsVjXLKv1d7ftFbs1R2FWpVV8 WQLWyJiUpWiLFJk597InLnRFQJxWRlfANppDMhsGb9yX5f8A/kozu+DXpBgng5i+pibo Y93HAI0ya4YZ5QL0IXswNwnHKfrpUzJEloqpUDeIz1C/NV2ZTf8zFc9kR3l1SHJwsStN kU+g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=4aSw1ivdPMpOK7KZaAsy5z/4AL77f49v5pu2bSxpw3M=; b=Xq5dtY+r5SUvWQeVJEWg075pBDC16iyLb/Vh4ck48ThuZ8DNS48WzzsyQ6/T+4pAzy GYGkYku1lNBqGC6lnNqWa2SD4K6qjUtAvp7o4JdZVwa7TTmMATjcq9caS4AwvpGmbVel WZC9OM3J6s8iK/eeIKSYIKeBqkpQD4mtgi3hqBFlDx7ObkYKsnOZsLRjBIjADH2xyDSR 9j8JlKkgQLaYN9kwJemaUE6IK+Rs1TIZJCt7bpClssIAPgbuNQPK1NHqmh1hW8VNOT6i jN1L1e+fsMq1lkglqzCi4CYucf94w7KlvDEfwlbH0kZ5b2HgifIJP94yTXFhoULovEig z1sA== X-Gm-Message-State: AJaThX48rGG18I1Jgc71lCK57fTeGCYHhOTb3zZbF76RfnhSgaEzLWiP ev+naRUbUgGiCemAwCLjkxk= X-Received: by 10.107.30.76 with SMTP id e73mr32652721ioe.60.1511828989224; Mon, 27 Nov 2017 16:29:49 -0800 (PST) Received: from rlippert.svl.corp.google.com ([100.123.242.116]) by smtp.gmail.com with ESMTPSA id 126sm6986268iov.21.2017.11.27.16.29.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 27 Nov 2017 16:29:48 -0800 (PST) From: Robert Lippert X-Google-Original-From: Robert Lippert To: linux@roeck-us.net Cc: linux-hwmon@vger.kernel.org, jdelvare@suse.com, linux-kernel@vger.kernel.org, xow@google.com, Robert Lippert Subject: [PATCH] hwmon: (pmbus/lm25066) Default coefficients for low current limit Date: Mon, 27 Nov 2017 16:28:58 -0800 Message-Id: <20171128002858.1821-1-rlippert@google.com> X-Mailer: git-send-email 2.15.0.417.g466bffb3ac-goog Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org There seems to be no way to detect the value of the CL/GAIN pin from the device using PMBus. Low current mode seems to be recommended (from LM5066 datasheet) for improved current reporting accuracy in a typical design. Assume the device is in low current mode unless the register override bit is set and indicates high current limit mode. Signed-off-by: Robert Lippert --- drivers/hwmon/pmbus/lm25066.c | 19 +++++++++++++------ 1 file changed, 13 insertions(+), 6 deletions(-) diff --git a/drivers/hwmon/pmbus/lm25066.c b/drivers/hwmon/pmbus/lm25066.c index aa052f4449a9..f6ae7b4cf705 100644 --- a/drivers/hwmon/pmbus/lm25066.c +++ b/drivers/hwmon/pmbus/lm25066.c @@ -43,6 +43,7 @@ enum chips { lm25056, lm25063, lm25066, lm5064, lm5066, lm5066i }; #define LM25066_READ_AVG_IIN 0xde #define LM25066_READ_AVG_PIN 0xdf +#define LM25066_DEV_SETUP_CL_CONFIG BIT(2) /* Use pin or SMBus values */ #define LM25066_DEV_SETUP_CL BIT(4) /* Current limit */ /* LM25056 only */ @@ -526,16 +527,22 @@ static int lm25066_probe(struct i2c_client *client, info->R[PSC_VOLTAGE_OUT] = coeff[PSC_VOLTAGE_OUT].R; info->R[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN].R; info->R[PSC_POWER] = coeff[PSC_POWER].R; - if (config & LM25066_DEV_SETUP_CL) { - info->m[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN_L].m; - info->b[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN_L].b; - info->m[PSC_POWER] = coeff[PSC_POWER_L].m; - info->b[PSC_POWER] = coeff[PSC_POWER_L].b; - } else { + + /* + * Assume chip is in low current limit/gain mode by default unless + * the register override is asserted AND indicates high limit mode. + */ + if ((config & LM25066_DEV_SETUP_CL_CONFIG) && + (config & LM25066_DEV_SETUP_CL)) { info->m[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN].m; info->b[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN].b; info->m[PSC_POWER] = coeff[PSC_POWER].m; info->b[PSC_POWER] = coeff[PSC_POWER].b; + } else { + info->m[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN_L].m; + info->b[PSC_CURRENT_IN] = coeff[PSC_CURRENT_IN_L].b; + info->m[PSC_POWER] = coeff[PSC_POWER_L].m; + info->b[PSC_POWER] = coeff[PSC_POWER_L].b; } return pmbus_do_probe(client, id, info); -- 2.15.0.417.g466bffb3ac-goog From 1586482494737980761@xxx Mon Dec 11 10:20:08 +0000 2017 X-GM-THRID: 1586482494737980761 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread