Received: by 10.223.164.202 with SMTP id h10csp4699566wrb; Wed, 29 Nov 2017 10:22:16 -0800 (PST) X-Google-Smtp-Source: AGs4zMZwEF2g5k++NQAaq2p23F8w5fknq+CyfGEGkSg2r5VBhSnHvDpdGB/mEX45AQOnN0St7VJF X-Received: by 10.159.216.150 with SMTP id s22mr3760130plp.158.1511979736262; Wed, 29 Nov 2017 10:22:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511979736; cv=none; d=google.com; s=arc-20160816; b=QkfA1t/rYVC0WApy5AQccUaqVFG9vi4fBhMiO5Hv4x9S1T1v0miZBvP2PaWh7S6jcL P4kkSwZewJYF3nykKeViqm0fKnICE+O07LCXQw8qOr/Or0Hr/LK/l17ykrhct7FZWq/m gLluhvhzG/EjhE3/5bmNjUVkeoaNOnaRHIabffRjmaMbfwywkSSWxHtgPZZyCczv2uXU pMQh4kPgB/wOm8acEnZe2pflbq/mKiqBtcW/jP0VstHHX1gVFB/yZEi3+rvAiBEQXNrY sVpejdAIIzlxCOZJiWeyJgi9ut4+6e5UjZ++cY1yAz/bU/bJkk/FqaIbBZiOSIkCrjhN 5agw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-disposition :content-transfer-encoding:mime-version:in-reply-to:references :subject:cc:to:from:date:message-id:arc-authentication-results; bh=RdT1YkrkDjX3wp3uB3tlJc+tw+aDCkyHF/8efjScKYg=; b=xi41rIcyGmzT0BIS8HwLRfmuY8UKInsrBnSGgIaML43KlvzgyIyZXHuCZMXD/+7slQ SA0oIcOwTm+kzDuzozePxyoKK5eDRGRwQwjfHwuutljI3rMDl4ND78HARLkYNaGPAkNF Rl52GL1nXLfMot8cOuM7YymMbbogA+t42lzNx1APE6ZruHKP6NC9GLN2cdV/1c5ddBGg yjdZGYLWbhznv7FFa8PhVhQHWsVK/+y2BckJSzGlrGYQj+5kmOYq6TqaUhkhmiXCMKTG QfhT7PvgYCJwvR301POdDSwUd0O73tPDHw5PwtywxTFnf4HpkfZ29R/ib9dJftOpMXP6 aNGw== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 1si1632429plj.141.2017.11.29.10.22.06; Wed, 29 Nov 2017 10:22:16 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S933555AbdK2PuZ convert rfc822-to-8bit (ORCPT + 69 others); Wed, 29 Nov 2017 10:50:25 -0500 Received: from prv-mh.provo.novell.com ([137.65.248.74]:56118 "EHLO prv-mh.provo.novell.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S933034AbdK2PuY (ORCPT ); Wed, 29 Nov 2017 10:50:24 -0500 Received: from INET-PRV-MTA by prv-mh.provo.novell.com with Novell_GroupWise; Wed, 29 Nov 2017 08:50:23 -0700 Message-Id: <5A1EE54D020000780019335F@prv-mh.provo.novell.com> X-Mailer: Novell GroupWise Internet Agent 14.2.2 Date: Wed, 29 Nov 2017 08:50:21 -0700 From: "Jan Beulich" To: "Govinda Tatti" Cc: , , , , "Juergen Gross" , Subject: Re: [Xen-devel] [PATCH V2] Xen/pciback: Implement PCI slot or bus reset with 'do_flr' SysFS attribute References: <20171108230654.2981-1-Govinda.Tatti@Oracle.COM> <5A0424B7020000780018D6FA@prv-mh.provo.novell.com> In-Reply-To: Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 8BIT Content-Disposition: inline Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >>> On 29.11.17 at 16:37, wrote: > On 11/9/2017 2:49 AM, Jan Beulich wrote: >>>>> On 09.11.17 at 00:06, wrote: >>> +static int pcistub_reset_dev(struct pci_dev *dev) >>> +{ >>> + struct xen_pcibk_dev_data *dev_data; >>> + bool slot = false, bus = false; >>> + struct pcistub_args arg = {}; >>> + >>> + if (!dev) >>> + return -EINVAL; >>> + >>> + dev_dbg(&dev->dev, "[%s]\n", __func__); >>> + >>> + if (!pci_probe_reset_slot(dev->slot)) >>> + slot = true; >>> + else if ((!pci_probe_reset_bus(dev->bus)) && >>> + (!pci_is_root_bus(dev->bus))) >>> + bus = true; >>> + >>> + if (!bus && !slot) >>> + return -EOPNOTSUPP; >>> + >>> + /* >>> + * Make sure all devices on this bus are owned by the >>> + * PCI backend so that we can safely reset the whole bus. >>> + */ >> Is that really the case when you mean to do a slot reset? It was for >> a reason that I had asked about a missing "else" in v1 review, >> rather than questioning the conditional around the logic. > > In the case of bus or slot reset, our goal is to reset connected PCIe > fabric/card/endpoint. > The connected card/endpoint can be multi-function device. So, same > walk-through and checking > is needed irrespective of type of reset being used. I don't follow: The scope of other devices/functions possibly affected by a reset depends on the type of reset, doesn't it? Jan From 1585423168831191758@xxx Wed Nov 29 17:42:36 +0000 2017 X-GM-THRID: 1583541656865711781 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread