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[209.132.180.67]) by mx.google.com with ESMTP id f89si1586599plb.25.2017.11.29.09.42.26; Wed, 29 Nov 2017 09:42:36 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=oracle.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S934782AbdK2RkP (ORCPT + 70 others); Wed, 29 Nov 2017 12:40:15 -0500 Received: from userp1040.oracle.com ([156.151.31.81]:18489 "EHLO userp1040.oracle.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934205AbdK2RkM (ORCPT ); Wed, 29 Nov 2017 12:40:12 -0500 Received: from userv0021.oracle.com (userv0021.oracle.com [156.151.31.71]) by userp1040.oracle.com (Sentrion-MTA-4.3.2/Sentrion-MTA-4.3.2) with ESMTP id vATHd2rr018060 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 29 Nov 2017 17:39:02 GMT Received: from aserv0122.oracle.com (aserv0122.oracle.com [141.146.126.236]) by userv0021.oracle.com (8.14.4/8.14.4) with ESMTP id vATHd1k8020548 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Wed, 29 Nov 2017 17:39:02 GMT Received: from abhmp0007.oracle.com (abhmp0007.oracle.com [141.146.116.13]) by aserv0122.oracle.com (8.14.4/8.14.4) with ESMTP id vATHd1RY013551; Wed, 29 Nov 2017 17:39:01 GMT Received: from [10.135.190.159] (/10.135.190.159) by default (Oracle Beehive Gateway v4.0) with ESMTP ; Wed, 29 Nov 2017 09:39:01 -0800 Subject: Re: [Xen-devel] [PATCH V2] Xen/pciback: Implement PCI slot or bus reset with 'do_flr' SysFS attribute To: Jan Beulich Cc: Juergen Gross , linux-kernel@vger.kernel.org, xen-devel@lists.xenproject.org, boris.ostrovsky@oracle.com, roger.pau@citrix.com References: <20171108230654.2981-1-Govinda.Tatti@Oracle.COM> <5A0424B7020000780018D6FA@prv-mh.provo.novell.com> <5A1EE54D020000780019335F@prv-mh.provo.novell.com> From: Govinda Tatti Organization: Oracle Corporation Message-ID: <2783ea8a-3ef3-c4dd-a592-52cf8e188ad4@oracle.com> Date: Wed, 29 Nov 2017 11:38:57 -0600 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <5A1EE54D020000780019335F@prv-mh.provo.novell.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US X-Source-IP: userv0021.oracle.com [156.151.31.71] Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org >> In the case of bus or slot reset, our goal is to reset connected PCIe >> fabric/card/endpoint. >> The connected card/endpoint can be multi-function device. So, same >> walk-through and checking >> is needed irrespective of type of reset being used. > I don't follow: The scope of other devices/functions possibly > affected by a reset depends on the type of reset, doesn't it? For PCIe platforms, both slot and bus reset endup resetting all connected device/functions on thesecondary bus (behind the root-port or downstream-port). Cheers GOVINDA From 1585415384923729106@xxx Wed Nov 29 15:38:53 +0000 2017 X-GM-THRID: 1583541656865711781 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread