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[209.132.180.67]) by mx.google.com with ESMTP id j185si23967009pgd.620.2017.11.27.20.25.23; Mon, 27 Nov 2017 20:25:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=f6fOgKfM; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753505AbdK1EYu (ORCPT + 77 others); Mon, 27 Nov 2017 23:24:50 -0500 Received: from mail-io0-f193.google.com ([209.85.223.193]:45432 "EHLO mail-io0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751704AbdK1EYr (ORCPT ); Mon, 27 Nov 2017 23:24:47 -0500 Received: by mail-io0-f193.google.com with SMTP id z74so38882539iof.12; Mon, 27 Nov 2017 20:24:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=XoRq4nLV/CyXxRM7a/gaBnVCL+u3K4KPhNuPK5WRjng=; b=f6fOgKfMvnIE32V0Vgj0vGnUE+i4IdBBBnwXhJ4/QIRGRwxECE2XSlpsfRM5NjHPS1 sCW3EVbfZ/Y1lWbAwHIcdi6tkTWC9JKrbQNfQSfLFloGUS9OaDv6xMhDjRyI7HxU/7OV zqk07oNNyE92x0YtBffYvBAcZn3tiV1W0YpR42W/hSVd6F4nSywU+GH3JjDkPY7pJPwB 13oWTZOzuli/It2VyXQ+y2+2hEcakXiUU1RRsBKWIRg6HUxMs7bb5Ln45M92teib0hUj N9w2bCmjOWDDnOJcyRQzhfMmeMl5RGw18AfF9wGiH7X//FHv8A9Q+dnZSsY05i6AkRgT Unrg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=XoRq4nLV/CyXxRM7a/gaBnVCL+u3K4KPhNuPK5WRjng=; b=VTqPktdKX6EqZUcZ8J7b/jKkQhocSgtl64U34yaUoaaSGK9MQLNaT86I/p8Fm1pjG8 l4IQt3kyGB1eBcl0tJyLZ2gAPWNOh1uHXcNoL6bHkijhDmFPseBjstn40LXlB0jE7UpC 4fWFZo0dYiUO1Tmnpqh3j+B2m2EqFrUcTK8mLVlqLGfLI/eXEg/qAvMC18Yrlly0Y3DV LN+sXhbarxTZDyvrz7wHZHCLX4v2VN4dPIGErxJJPSDljvGuISxOm8ujUGJ6wy+OAHgI 15weDS5o0qcDb5m2q0BDzkcBrO3kOyhD+e6Bca0v7ls0BD64VX0JVE7cWZRWZ+AT+dks KZwQ== X-Gm-Message-State: AJaThX5kTvuUqwV8CVGADNMk5HCNJDAiaImwUXttrKVlCg4BREuCDh8+ h2HDww37HggjyI0WfTdovFq3akats0kW91AUa5g= X-Received: by 10.107.62.10 with SMTP id l10mr44686100ioa.178.1511843086578; Mon, 27 Nov 2017 20:24:46 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.7.91 with HTTP; Mon, 27 Nov 2017 20:24:46 -0800 (PST) In-Reply-To: <20171127135724.yy2jjjuby3xu74mm@lakrids.cambridge.arm.com> References: <56a24fae3cec68f80c41eebd98fcceb9b137ac64.1511785528.git.green.hu@gmail.com> <20171127135724.yy2jjjuby3xu74mm@lakrids.cambridge.arm.com> From: Vincent Chen Date: Tue, 28 Nov 2017 12:24:46 +0800 Message-ID: Subject: Re: [PATCH v2 10/35] nds32: Atomic operations To: Mark Rutland Cc: Greentime Hu , Greentime , Linux Kernel Mailing List , Arnd Bergmann , linux-arch , Thomas Gleixner , Jason Cooper , Marc Zyngier , Rob Herring , Networking , DTML , Al Viro , David Howells , Will Deacon , Daniel Lezcano , linux-serial@vger.kernel.org, Vincent Chen Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2017-11-27 21:57 GMT+08:00 Mark Rutland : > Hi, > > On Mon, Nov 27, 2017 at 08:27:57PM +0800, Greentime Hu wrote: >> +static inline void arch_spin_unlock(arch_spinlock_t * lock) >> +{ >> + asm volatile( >> + "xor $r15, $r15, $r15\n" >> + "swi $r15, [%0]\n" >> + : >> + :"r"(&lock->lock) >> + :"memory"); >> +} > > This looks suspicious. There's no clobber for $r15, so isn't this > corrupting a GPR behind the back of the compiler? > Thanks. $r15 is reserved for assembler. For safety, compiler always put $r15 in clobber register list by default. > Shouldn't there be a tmp variable for the register allocation rather > than hard-coding $r15? > >> +static inline void arch_write_unlock(arch_rwlock_t * rw) >> +{ >> + asm volatile( >> + "xor $r15, $r15, $r15\n" >> + "swi $r15, [%0]\n" >> + : >> + :"r"(&rw->lock) >> + :"memory","$r15"); >> +} > > This time you have a clobber, but it's still not clear to me why you > don't use a tmp variable and leave the register allocation to the > compiler. > Thanks. When I recheck the code, I found spinlock.h is not needed due that we do not support SMP. So, We decide to remove spinlock.h in the next version patch. Vincent > Thanks, > Mark. From 1585227940755606870@xxx Mon Nov 27 13:59:32 +0000 2017 X-GM-THRID: 1585224757949227907 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread