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[209.132.180.67]) by mx.google.com with ESMTP id q3si1351283pgf.680.2017.10.31.04.59.06; Tue, 31 Oct 2017 04:59:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=eSqoZMFB; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752245AbdJaL63 (ORCPT + 99 others); Tue, 31 Oct 2017 07:58:29 -0400 Received: from mail-ua0-f193.google.com ([209.85.217.193]:43829 "EHLO mail-ua0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751050AbdJaL61 (ORCPT ); Tue, 31 Oct 2017 07:58:27 -0400 Received: by mail-ua0-f193.google.com with SMTP id u32so11859895uau.0; Tue, 31 Oct 2017 04:58:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=I1UghOwxQIdi0TevWAkZQVjXUJY1ZsSSQZ7sHnf+Ixg=; b=eSqoZMFBD6Yaml5xjlkuL01yVVOhAeTUHv2ewNKhaiLyslLhJpFN3X1clD15G894RU rVuh24zV8+oay9OUnc5IB/wm0OiCsOsnDf0bx6qvgajHStw7KBbcDT+Jf3P/fzJM5esX piC+3LGroE2LIpcrwK+Xl0GWKtz7yu0Fj3d8nc/85rIk3yN5Tit3r4Ets2K8aihFGHLk cCot6lzJT/vKa9ytF+oYQ5o1PiM6uE7GwPjmzNPT7GTb2OCygxzFLi0KIIRETj7AQie0 D3Ks/BUV0xiemJy4Ja3sFV1Ryrr7Up59Hjd+N+ufXLCupg2tlHpxMxsS/Uuy/ssR0e/d ONGA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=I1UghOwxQIdi0TevWAkZQVjXUJY1ZsSSQZ7sHnf+Ixg=; b=PDvNn1/s0YS8wGBgI//lmSKkwg13qKWZWlYp238IYQ1CQFsJOnKwc05pKxWPbUQakB LWlbEgSn1HCjhfcwLZ30M3OI3qVpSQbl8bGRcYoh+zmKdD2ok4WaXzpNlzLJwp1sGK83 ddEIvPuPZSsII5fZWfelQTM+uMkIZ/t8/WO/mMBGSO9/blQTZGYTALyx8C9hZairO2lH in51RUD6Gkax6TavZbzb5V+ExGuMyemUwmQfDr65Iws//9fp7jfzaL+6+Qp3BRY7dKDN NrutU2EqLFLd9AWpILPMT13HE6VoA2FYWd/T7b0x9TqLuM83tnI8W6m2ggP6SxK408RW 9geQ== X-Gm-Message-State: AMCzsaX3U8XAJVYK6rbHQpaPnYW0GkErS5NAqcbhFJDuW+TpvHPoGsvu 7+D5ukkv7Y4cH1DSRcXRGVaw+CIM6+O4NepNvDQ= X-Received: by 10.159.62.1 with SMTP id o1mr1368796uai.123.1509451106320; Tue, 31 Oct 2017 04:58:26 -0700 (PDT) MIME-Version: 1.0 Received: by 10.103.151.217 with HTTP; Tue, 31 Oct 2017 04:58:25 -0700 (PDT) In-Reply-To: <20171031021203.18248-1-joel@jms.id.au> References: <20171031021203.18248-1-joel@jms.id.au> From: Philipp Zabel Date: Tue, 31 Oct 2017 12:58:25 +0100 Message-ID: Subject: Re: [PATCH v2] iio: adc: aspeed: Deassert reset in probe To: Joel Stanley Cc: Jonathan Cameron , Rick Altherr , Rob Herring , Hartmut Knaack , Lars-Peter Clausen , Peter Meerwald-Stadler , linux-iio@vger.kernel.org, devicetree@vger.kernel.org, LKML Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Tue, Oct 31, 2017 at 3:12 AM, Joel Stanley wrote: > The ASPEED SoC must deassert a reset in order to use the ADC peripheral. > > The device tree bindings are updated to document the resets phandle, and > the example is updated to match what is expected for both the reset and > clock phandle. Note that the bindings should have always had the reset > controller, as the hardware is unusable without it. > > Signed-off-by: Joel Stanley It is unfortunate that this has to break DT (theoretical) backwards compatibility, but given that the old bindings never worked, this is better than to pretend a required reset is optional. Reviewed-by: Philipp Zabel regards Philipp > --- > v2: > - Ensure disabling path unwinds in opposite order as the enable path > - Note that the bindings were incorrect without the reset phandle, > and for the system to be usable we must update them. No one was > (successfully) using these bindings/driver before without out of tree > hacks in mach-aspeed, as it would not have worked. > > .../devicetree/bindings/iio/adc/aspeed_adc.txt | 4 +++- > drivers/iio/adc/aspeed_adc.c | 25 ++++++++++++++++------ > 2 files changed, 22 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt > index 674e133b7cd7..034fc2ba100e 100644 > --- a/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt > +++ b/Documentation/devicetree/bindings/iio/adc/aspeed_adc.txt > @@ -8,6 +8,7 @@ Required properties: > - reg: memory window mapping address and length > - clocks: Input clock used to derive the sample clock. Expected to be the > SoC's APB clock. > +- resets: Reset controller phandle > - #io-channel-cells: Must be set to <1> to indicate channels are selected > by index. > > @@ -15,6 +16,7 @@ Example: > adc@1e6e9000 { > compatible = "aspeed,ast2400-adc"; > reg = <0x1e6e9000 0xb0>; > - clocks = <&clk_apb>; > + clocks = <&syscon ASPEED_CLK_APB>; > + resets = <&syscon ASPEED_RESET_ADC>; > #io-channel-cells = <1>; > }; > diff --git a/drivers/iio/adc/aspeed_adc.c b/drivers/iio/adc/aspeed_adc.c > index 8a958d5f1905..327a49ba1991 100644 > --- a/drivers/iio/adc/aspeed_adc.c > +++ b/drivers/iio/adc/aspeed_adc.c > @@ -17,6 +17,7 @@ > #include > #include > #include > +#include > #include > #include > > @@ -53,11 +54,12 @@ struct aspeed_adc_model_data { > }; > > struct aspeed_adc_data { > - struct device *dev; > - void __iomem *base; > - spinlock_t clk_lock; > - struct clk_hw *clk_prescaler; > - struct clk_hw *clk_scaler; > + struct device *dev; > + void __iomem *base; > + spinlock_t clk_lock; > + struct clk_hw *clk_prescaler; > + struct clk_hw *clk_scaler; > + struct reset_control *rst; > }; > > #define ASPEED_CHAN(_idx, _data_reg_addr) { \ > @@ -217,6 +219,15 @@ static int aspeed_adc_probe(struct platform_device *pdev) > goto scaler_error; > } > > + data->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL); > + if (IS_ERR(data->rst)) { > + dev_err(&pdev->dev, > + "invalid or missing reset controller device tree entry"); > + ret = PTR_ERR(data->rst); > + goto reset_error; > + } > + reset_control_deassert(data->rst); > + > model_data = of_device_get_match_data(&pdev->dev); > > if (model_data->wait_init_sequence) { > @@ -263,9 +274,10 @@ static int aspeed_adc_probe(struct platform_device *pdev) > writel(ASPEED_OPERATION_MODE_POWER_DOWN, > data->base + ASPEED_REG_ENGINE_CONTROL); > clk_disable_unprepare(data->clk_scaler->clk); > +reset_error: > + reset_control_assert(data->rst); > clk_enable_error: > clk_hw_unregister_divider(data->clk_scaler); > - > scaler_error: > clk_hw_unregister_divider(data->clk_prescaler); > return ret; > @@ -280,6 +292,7 @@ static int aspeed_adc_remove(struct platform_device *pdev) > writel(ASPEED_OPERATION_MODE_POWER_DOWN, > data->base + ASPEED_REG_ENGINE_CONTROL); > clk_disable_unprepare(data->clk_scaler->clk); > + reset_control_assert(data->rst); > clk_hw_unregister_divider(data->clk_scaler); > clk_hw_unregister_divider(data->clk_prescaler); > > -- > 2.14.1 > From 1582737467862333535@xxx Tue Oct 31 02:14:32 +0000 2017 X-GM-THRID: 1582667043959190093 X-Gmail-Labels: Inbox,Category Forums