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[209.132.180.67]) by mx.google.com with ESMTP id z22si10000749pfa.207.2017.11.20.11.26.57; Mon, 20 Nov 2017 11:27:07 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=kJ4sd/8m; dkim=pass header.i=@codeaurora.org header.s=default header.b=JF9n5gvo; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752324AbdKTTZh (ORCPT + 67 others); Mon, 20 Nov 2017 14:25:37 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:46796 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752024AbdKTTZf (ORCPT ); Mon, 20 Nov 2017 14:25:35 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 42A80607E8; Mon, 20 Nov 2017 19:25:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511205935; bh=iiEgAql3mIPYmiMR7aYSmIPHcyx1S94ACYMw6xK80wU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=kJ4sd/8m/H9kzexwcEgM1G5eiiv6nqVJZNqclnBcFFIDH3izgvAYHJQVUN0fAUTNW DXvyf8f8LX5p4N8sZZfhH6OPBQWVxCuz1Y2KMnYFK0yChg63VfqFY4hTPd7DBu/3oE chwPc6v6EalnVHsWIj7mIfuNTwg1x8nsoZvg74Og= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 8D4E2607E8; Mon, 20 Nov 2017 19:25:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511205934; bh=iiEgAql3mIPYmiMR7aYSmIPHcyx1S94ACYMw6xK80wU=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=JF9n5gvo9UNqQVgkx3+GMu2kbyUkORSUiQrP1Z/BiENr9foAL+pukbbA5N19vCUFg eFlanXvTbNSHG3u0NFGU2Sf1B+0hUH9i7yMCW09yxyz3HsaMcNX5key1cJLuJlVN0P cA0E77h280r8ID8lJu3KmPhdnZTAhWMhajdQ0/iw= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 8D4E2607E8 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Mon, 20 Nov 2017 11:25:34 -0800 From: Stephen Boyd To: Bjorn Andersson Cc: Adrian Hunter , Ulf Hansson , linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, Sahitya Tummala , Vijay Viswanath Subject: Re: [PATCH] mmc: sdhci-msm: Optionally wait for signal level changes Message-ID: <20171120192534.GE18379@codeaurora.org> References: <20171120183451.18966-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171120183451.18966-1-bjorn.andersson@linaro.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/20, Bjorn Andersson wrote: > Not all instances of the SDCC core supports changing signal voltage and > as such will not generate a power interrupt when the software attempts > to change the voltage. This results in probing the eMMC on some devices > to take over 2 minutes. > > Check that the SWITCHABLE_SIGNAL_VOLTAGE bit in MCI_GENERICS is set T in SWITCHABLE_SIGNAL_VOLTAGE here. > before waiting for the power interrupt. > > Cc: Sahitya Tummala > Cc: Vijay Viswanath > Fixes: c0309b3803fe ("mmc: sdhci-msm: Add sdhci msm register write APIs which wait for pwr irq") > Signed-off-by: Bjorn Andersson > --- > > The offending patch is part of your v4.15 pull request, so please pick > this up for the -rcs. > > drivers/mmc/host/sdhci-msm.c | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) > > diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c > index 3fb7d2eec93f..8f2dda73e6b4 100644 > --- a/drivers/mmc/host/sdhci-msm.c > +++ b/drivers/mmc/host/sdhci-msm.c > @@ -29,6 +29,9 @@ > #define CORE_VERSION_MAJOR_MASK (0xf << CORE_VERSION_MAJOR_SHIFT) > #define CORE_VERSION_MINOR_MASK 0xff > > +#define CORE_MCI_GENERICS 0x70 > +#define SWICHABLE_SIGNALING_VOLTAGE BIT(29) But then the T isn't here. -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From 1584611141081416243@xxx Mon Nov 20 18:35:46 +0000 2017 X-GM-THRID: 1584611141081416243 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread