Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67;
Content-Type: text/plain; charset=us-ascii
Mime-Version: 1.0 (Mac OS X Mail 10.3 \(3273\))
Subject: Re: [PATCH v2 2/2] x86: disable IRQs before changing CR4
From:   Nadav Amit <nadav.amit@gmail.com>
In-Reply-To: <alpine.DEB.2.20.1711251017580.2316@nanos>
Date:   Sat, 25 Nov 2017 09:20:23 -0800
Cc:     LKML <linux-kernel@vger.kernel.org>, linux-edac@vger.kernel.org,
        Andy Lutomirski <luto@kernel.org>,
        Ingo Molnar <mingo@redhat.com>,
        "H. Peter Anvin" <hpa@zytor.com>, x86@kernel.org,
        Tony Luck <tony.luck@intel.com>,
        Borislav Petkov <bp@alien8.de>,
        Paolo Bonzini <pbonzini@redhat.com>,
        =?utf-8?B?UmFkaW0gS3LEjW3DocWZ?= <rkrcmar@redhat.com>
Content-Transfer-Encoding: quoted-printable
Message-Id: <803D7D69-1F01-4CB8-A966-A040F302D1C0@gmail.com>
References: <20171125032907.2241-1-namit@vmware.com>
 <20171125032907.2241-3-namit@vmware.com>
 <alpine.DEB.2.20.1711251017580.2316@nanos>
To:     Thomas Gleixner <tglx@linutronix.de>
Sender: linux-kernel-owner@vger.kernel.org
Precedence: bulk

Thomas Gleixner <tglx@linutronix.de> wrote:

> On Fri, 24 Nov 2017, Nadav Amit wrote:
>> /* Set in this cpu's CR4. */
>> -static inline void cr4_set_bits(unsigned long mask)
>> +static inline void cr4_set_bits_irqs_off(unsigned long mask)
>=20
> This change is kinda weird. I'd expect that there is a corresponding
> function cr4_set_bits() which takes care of disabling interrupts. But =
there
> is not. All it does is creating a lot of pointless churn.
>=20
>> static __always_inline void setup_smep(struct cpuinfo_x86 *c)
>> static __init int setup_disable_smap(char *arg)
>> static __always_inline void setup_pku(struct cpuinfo_x86 *c)
>=20
> Why are you not doing this at the call site around all calls which =
fiddle
> with cr4, i.e. in identify_cpu() ?
>=20
> identify_cpu() is called from two places:
>=20
>    identify_boot_cpu() and identify_secondary_cpu()
>=20
> identify_secondary_cpu is called with interrupts disabled anyway and =
there
> is no reason why we can't enforce interrupts being disabled around
> identify_cpu() completely.
>=20
> But if we actually do the right thing, i.e. having cr4_set_bit() and
> cr4_set_bit_irqsoff() all of this churn goes away magically.
>=20
> Then the only place which needs to be changed is the context switch =
because
> here interrupts are already disabled and we really care about =
performance.
>=20
>> @@ -293,7 +303,7 @@ void __switch_to_xtra(struct task_struct *prev_p, =
struct task_struct *next_p,
>> 	}
>>=20
>> 	if ((tifp ^ tifn) & _TIF_NOTSC)
>> -		cr4_toggle_bits(X86_CR4_TSD);
>> +		cr4_toggle_bits_irqs_off(X86_CR4_TSD);

You make a good point. I will add cr4_set_bit(). I will leave =
identify_cpu()
as is, since it is rather hard to maintain code that enables/disables =
irqs
at one point and rely on these operations at a completely different =
place.
As you said, it is less of an issue once cr4_set_bit() and friends are
introduced.

Thanks,
Nadav=

From 1585034096978265460@xxx Sat Nov 25 10:38:28 +0000 2017
X-GM-THRID: 1585008173950843474
X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread