Received: by 10.223.164.202 with SMTP id h10csp4904657wrb; Tue, 21 Nov 2017 01:26:29 -0800 (PST) X-Google-Smtp-Source: AGs4zMYTByITT5/0jyXcEex8mfJO5uA8wV2bUlNvjYMlfkm6ZcyBMfTtlVpNC8kF6kM5naZjYb1H X-Received: by 10.84.168.35 with SMTP id e32mr16938003plb.122.1511256389822; Tue, 21 Nov 2017 01:26:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511256389; cv=none; d=google.com; s=arc-20160816; b=PDw6gfn3MuGx7gEcJfWWX+PbqMmD+g1qBm8uOZCbFcevWqq48RXuM2XTv2h8yEGdt6 vQAjaQkeF+yHX2onB89FjqGti7od/xvfuz6QBsijOr50bDZfhOSQyetaFJuWnuRFOS+l NPeIJb87wZyneKOQ/8TSJdAaiu0gpkRVXWyyT0hX9WAYlWuwpYc850ETs/zkjKGLXCir A+s5cZWMj4T2EUELUZz/hxToYRvig52qeH+/oU48aPXLU/l/ctMdh0pABVHDitj6i3vh 8ihfI6QGy23gRl76PTT5bctaCm88kUFE+0DimTA9Zj8r28XezGPpeazabD1G93cCDgOy Ky4Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dmarc-filter:dkim-signature:dkim-signature :arc-authentication-results; bh=ZUdBcbUiBDZ11HkOZ9gD8nA2MZ6KPEPE+/I3mXeqjZY=; b=L7WXzYKnKfcI3Q8glzoqtuUjoRN+zAIQSAGjBv/jCkS5knCWnYfV9RpmqCzAcayjzN cw6SF2Ef7zgE6EIwIXmEwYPG9rXh0LvsBl0ODBl4z9tC1O9IDIm6LUt3G+DhR9CUJvxZ Swh/bZP0Os354vVojjOG2g7SUGWcXr2BzU+HxYhkbNgBRsgbSAUOA196Wlo2Ti0l9Xod 9WDSCr4JY4FLNuot0umHWeVwVvWVze8KtUp+MzpMswtXyCfGIO/rwIzBlj1jZbujB1t5 oWZF5LIvdFvNkFRHGGemKluHVznY4W+fRcZcD6YJNs3MYDbKppeOuSqDuhY3wrYLcrbL GqcA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=bE6zRmRm; dkim=pass header.i=@codeaurora.org header.s=default header.b=g5NcD7sE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id k3si10255743pgc.747.2017.11.21.01.26.19; Tue, 21 Nov 2017 01:26:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=bE6zRmRm; dkim=pass header.i=@codeaurora.org header.s=default header.b=g5NcD7sE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751482AbdKUJYM (ORCPT + 72 others); Tue, 21 Nov 2017 04:24:12 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:40856 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751184AbdKUJYH (ORCPT ); Tue, 21 Nov 2017 04:24:07 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 962B5607EA; Tue, 21 Nov 2017 09:24:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511256246; bh=w+1cx7mD72gsGMZkWXrfQMGXcEe/Q1XYVcZ/k/iGO5Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bE6zRmRmMOh4hk2JXBs/aKPzW8RD/HnZrp7OoZ25coUQJjkULpcrpYp8bW9TxdLis tTXV9bUkTBJzTP6UvM3quJ8fidj1LYfjLxrR3lCt/CCisTJnQb4SlWWjccdVFv6qUr hs606TCUxp8X+CvTpIo1IBNy1qfPRozRStTEH2dc= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from mgautam-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mgautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id C0C11607F1; Tue, 21 Nov 2017 09:24:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511256245; bh=w+1cx7mD72gsGMZkWXrfQMGXcEe/Q1XYVcZ/k/iGO5Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=g5NcD7sE71Rl6NW81lgwwlnOPNlFQXaR2aMqnlAO3vsAN8jLl9nShGe4eISTSryAs d3iiaukHlg4MMOZyyIjoPCEC9K+Sz27qQJWJvGhsveUs8BZvhIMm6hV6vkPtpvUDt8 7lSZqJ2llyyrkB1z4qEubXHjzB2RfxKiUh2Fwf6g= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C0C11607F1 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=mgautam@codeaurora.org From: Manu Gautam To: Kishon Vijay Abraham I Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, Manu Gautam , Vivek Gautam , Varadarajan Narayanan , smuthayy , Wei Yongjun , Fengguang Wu , linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v3 03/16] phy: qcom-qmp: Power-on PHY before initialization Date: Tue, 21 Nov 2017 14:53:13 +0530 Message-Id: <1511256206-1587-4-git-send-email-mgautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511256206-1587-1-git-send-email-mgautam@codeaurora.org> References: <1511256206-1587-1-git-send-email-mgautam@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PHY must be powered on before turning ON clocks and attempting to initialize it. Driver is exposing separate init and power_on routines for this. Apparently USB dwc3 core driver performs power-on after init. Also, poweron and init for QMP PHY need to be executed together always, hence remove poweron callback from phy_ops and explicitly perform this from com_init, similar changes needed for poweroff. On similar lines move clk_enable from init to com_init which can be called once for multi lane PHYs. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 61 +++++++++++++------------------------ 1 file changed, 21 insertions(+), 40 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index 90794dd..2f427e3 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -720,33 +720,6 @@ static void qcom_qmp_phy_configure(void __iomem *base, } } -static int qcom_qmp_phy_poweron(struct phy *phy) -{ - struct qmp_phy *qphy = phy_get_drvdata(phy); - struct qcom_qmp *qmp = qphy->qmp; - int num = qmp->cfg->num_vregs; - int ret; - - dev_vdbg(&phy->dev, "Powering on QMP phy\n"); - - /* turn on regulator supplies */ - ret = regulator_bulk_enable(num, qmp->vregs); - if (ret) - dev_err(qmp->dev, "failed to enable regulators, err=%d\n", ret); - - return ret; -} - -static int qcom_qmp_phy_poweroff(struct phy *phy) -{ - struct qmp_phy *qphy = phy_get_drvdata(phy); - struct qcom_qmp *qmp = qphy->qmp; - - regulator_bulk_disable(qmp->cfg->num_vregs, qmp->vregs); - - return 0; -} - static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) { const struct qmp_phy_cfg *cfg = qmp->cfg; @@ -759,6 +732,19 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) return 0; } + /* turn on regulator supplies */ + ret = regulator_bulk_enable(cfg->num_vregs, qmp->vregs); + if (ret) { + mutex_unlock(&qmp->phy_mutex); + return ret; + } + + ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); + if (ret) { + dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret); + goto err_clk_enable; + } + for (i = 0; i < cfg->num_resets; i++) { ret = reset_control_deassert(qmp->resets[i]); if (ret) { @@ -803,6 +789,9 @@ static int qcom_qmp_phy_com_init(struct qcom_qmp *qmp) err_rst: while (--i >= 0) reset_control_assert(qmp->resets[i]); + clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); +err_clk_enable: + regulator_bulk_disable(cfg->num_vregs, qmp->vregs); mutex_unlock(&qmp->phy_mutex); return ret; @@ -832,6 +821,10 @@ static int qcom_qmp_phy_com_exit(struct qcom_qmp *qmp) while (--i >= 0) reset_control_assert(qmp->resets[i]); + clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); + + regulator_bulk_disable(cfg->num_vregs, qmp->vregs); + mutex_unlock(&qmp->phy_mutex); return 0; @@ -852,15 +845,9 @@ static int qcom_qmp_phy_init(struct phy *phy) dev_vdbg(qmp->dev, "Initializing QMP phy\n"); - ret = clk_bulk_prepare_enable(cfg->num_clks, qmp->clks); - if (ret) { - dev_err(qmp->dev, "failed to enable clks, err=%d\n", ret); - return ret; - } - ret = qcom_qmp_phy_com_init(qmp); if (ret) - goto err_com_init; + return ret; if (cfg->has_lane_rst) { ret = reset_control_deassert(qphy->lane_rst); @@ -915,8 +902,6 @@ static int qcom_qmp_phy_init(struct phy *phy) reset_control_assert(qphy->lane_rst); err_lane_rst: qcom_qmp_phy_com_exit(qmp); -err_com_init: - clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); return ret; } @@ -943,8 +928,6 @@ static int qcom_qmp_phy_exit(struct phy *phy) qcom_qmp_phy_com_exit(qmp); - clk_bulk_disable_unprepare(cfg->num_clks, qmp->clks); - return 0; } @@ -1057,8 +1040,6 @@ static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np) static const struct phy_ops qcom_qmp_phy_gen_ops = { .init = qcom_qmp_phy_init, .exit = qcom_qmp_phy_exit, - .power_on = qcom_qmp_phy_poweron, - .power_off = qcom_qmp_phy_poweroff, .owner = THIS_MODULE, }; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From 1585293412984885222@xxx Tue Nov 28 07:20:11 +0000 2017 X-GM-THRID: 1584141916495643958 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread