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[209.132.180.67]) by mx.google.com with ESMTP id f65si5814351pfj.298.2017.11.27.04.55.49; Mon, 27 Nov 2017 04:56:00 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Poa0VKA8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752767AbdK0MzA (ORCPT + 77 others); Mon, 27 Nov 2017 07:55:00 -0500 Received: from mail-pf0-f196.google.com ([209.85.192.196]:39431 "EHLO mail-pf0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752736AbdK0My4 (ORCPT ); Mon, 27 Nov 2017 07:54:56 -0500 Received: by mail-pf0-f196.google.com with SMTP id l24so17343942pfj.6; Mon, 27 Nov 2017 04:54:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=lyjlDqyLNobB750DCTZALiTlx7almEMiqEMN4S934u4=; b=Poa0VKA8sL98T6IbeggOqm+DaDU8N3SZjI96fPU9M4sq3aOciGKGL6VJEF6NUE+vFI igVbXZFG+udAQ22+2O7WciUUH2sJDkpZsJpneNubeLo1AzftB+JpJ0Gj1s7GwT71Usd2 kFa8SdnQb9newozpyiOpjSy6SE9CStn3KdkxxfL5qokrwPo5ji5oo9l2z+dVb0W1Ogpl KOaINmf8KQ9HGcDd355kQDA7n1Hq0g2cNbdPXvy7jvnkSsY3d4U+IfiwLuI6YJKuy6hJ bUEtz5XyDhYZ71ToqbmydducD7s/t0zfg+/Ojf2EPH5kQ4GDZ+BnXs8kzSX0n/eoG+Fg T2kA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=lyjlDqyLNobB750DCTZALiTlx7almEMiqEMN4S934u4=; b=XrR61x6TQaoykcMCQBmntt/yHIQeK7lUYrZ1cdco6fhavHLLb+QgY0X1FVlJOEoLlh GlBuwCYJYEeo2s1t59+VCmOKDenZHtXvd1pwkwLuioqB6xY35p0It1Cbd4SP0mP10Com S0AnTgdvAFwzmP5tcFbbCgfvUGgwQ9Do2UCS4O/W1io2ZyPVBLQ1WbcP/Zglob1KWwCu uv/Jjux168VRLgV1KveCzld7Wdl8XH9udLz7cm7ku/VPolBZtsOmm+VQaYXRf3vWocuz bE27sHD/IHUx7K0qGPPPiwgO2yIYfarMY8zGO5YYoyMmo7w5cvBPDgvlYBTvRXt1/5sF v3DA== X-Gm-Message-State: AJaThX4P/PN5OO+qNDRma88329SweaC3LS33piS9qX5cYvdHdwXGoZdT sGLIShhdHDT9Jv3XAozC0hw= X-Received: by 10.101.72.132 with SMTP id n4mr7081761pgs.288.1511787294952; Mon, 27 Nov 2017 04:54:54 -0800 (PST) Received: from app09.andestech.com ([118.163.51.199]) by smtp.gmail.com with ESMTPSA id w64sm55225459pfj.62.2017.11.27.04.54.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 27 Nov 2017 04:54:54 -0800 (PST) From: Greentime Hu To: greentime@andestech.com, linux-kernel@vger.kernel.org, arnd@arndb.de, linux-arch@vger.kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, robh+dt@kernel.org, netdev@vger.kernel.org, deanbo422@gmail.com, devicetree@vger.kernel.org, viro@zeniv.linux.org.uk, dhowells@redhat.com, will.deacon@arm.com, daniel.lezcano@linaro.org, linux-serial@vger.kernel.org Cc: green.hu@gmail.com, Rick Chen Subject: [PATCH v2 26/35] dt-bindings: interrupt-controller: Andestech Internal Vector Interrupt Controller Date: Mon, 27 Nov 2017 20:28:13 +0800 Message-Id: X-Mailer: git-send-email 1.7.9.5 In-Reply-To: References: In-Reply-To: References: Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Greentime Hu This patch adds an irqchip driver document for the Andestech Internal Vector Interrupt Controller. Signed-off-by: Rick Chen Signed-off-by: Greentime Hu --- .../interrupt-controller/andestech,ativic32.txt | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt new file mode 100644 index 0000000..f4b4193 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/andestech,ativic32.txt @@ -0,0 +1,19 @@ +* Andestech Internal Vector Interrupt Controller + +The Internal Vector Interrupt Controller (IVIC) is a basic interrupt controller +suitable for a simpler SoC platform not requiring a more sophisticated and +bigger External Vector Interrupt Controller. + + +Main node required properties: + +- compatible : should at least contain "andestech,ativic32". +- interrupt-controller : Identifies the node as an interrupt controller +- #interrupt-cells: 1 cells and refer to interrupt-controller/interrupts + +Examples: + intc: interrupt-controller { + compatible = "andestech,ativic32"; + #interrupt-cells = <1>; + interrupt-controller; + }; -- 1.7.9.5 From 1585872067342506575@xxx Mon Dec 04 16:37:39 +0000 2017 X-GM-THRID: 1585872067342506575 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread