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[209.132.180.67]) by mx.google.com with ESMTP id b62si9508798pfe.291.2017.11.21.01.25.31; Tue, 21 Nov 2017 01:25:41 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=TyuLe1Ah; dkim=pass header.i=@codeaurora.org header.s=default header.b=TyuLe1Ah; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751683AbdKUJYd (ORCPT + 72 others); Tue, 21 Nov 2017 04:24:33 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:41192 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751618AbdKUJY2 (ORCPT ); Tue, 21 Nov 2017 04:24:28 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 999F9607E2; Tue, 21 Nov 2017 09:24:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511256267; bh=XgiuVaGEOMX0OEO/+RNlmoDkBqNm5SX3pkGtKVcaSI4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TyuLe1AhYmEEoXEMlLVPlu/hqC2wFEs3kgIIQySaRb7GloQ7kgqSA1SPgIGpQCLqt LZm8YWqzm23Ghi4cD3/v7188kkghl92FUPCuR6FvEr0kSb1h5uznv1TXvslIrnTJJi bY7NRbictUVmq/frsvSOEIyUgzYrICsa7mk492eQ= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from mgautam-linux.qualcomm.com (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: mgautam@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 85D0360819; Tue, 21 Nov 2017 09:24:24 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511256267; bh=XgiuVaGEOMX0OEO/+RNlmoDkBqNm5SX3pkGtKVcaSI4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TyuLe1AhYmEEoXEMlLVPlu/hqC2wFEs3kgIIQySaRb7GloQ7kgqSA1SPgIGpQCLqt LZm8YWqzm23Ghi4cD3/v7188kkghl92FUPCuR6FvEr0kSb1h5uznv1TXvslIrnTJJi bY7NRbictUVmq/frsvSOEIyUgzYrICsa7mk492eQ= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 85D0360819 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=mgautam@codeaurora.org From: Manu Gautam To: Kishon Vijay Abraham I Cc: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, Manu Gautam , Vivek Gautam , Varadarajan Narayanan , Fengguang Wu , Wei Yongjun , linux-kernel@vger.kernel.org (open list:GENERIC PHY FRAMEWORK) Subject: [PATCH v3 06/16] phy: qcom-qmp: Move SERDES/PCS START after PHY reset Date: Tue, 21 Nov 2017 14:53:16 +0530 Message-Id: <1511256206-1587-7-git-send-email-mgautam@codeaurora.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511256206-1587-1-git-send-email-mgautam@codeaurora.org> References: <1511256206-1587-1-git-send-email-mgautam@codeaurora.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Driver is currently performing PHY reset after starting SERDES/PCS. As per hardware datasheet reset must be done before starting PHY. Hence, update the sequence. Signed-off-by: Manu Gautam --- drivers/phy/qualcomm/phy-qcom-qmp.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c b/drivers/phy/qualcomm/phy-qcom-qmp.c index aa27757..263cf50 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp.c @@ -882,12 +882,12 @@ static int qcom_qmp_phy_init(struct phy *phy) if (cfg->has_pwrdn_delay) usleep_range(cfg->pwrdn_delay_min, cfg->pwrdn_delay_max); - /* start SerDes and Phy-Coding-Sublayer */ - qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); - /* Pull PHY out of reset state */ qphy_clrbits(pcs, cfg->regs[QPHY_SW_RESET], SW_RESET); + /* start SerDes and Phy-Coding-Sublayer */ + qphy_setbits(pcs, cfg->regs[QPHY_START_CTRL], cfg->start_ctrl); + status = pcs + cfg->regs[QPHY_PCS_READY_STATUS]; mask = cfg->mask_pcs_ready; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project From 1584644184809241622@xxx Tue Nov 21 03:20:59 +0000 2017 X-GM-THRID: 1583929638158288060 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread