Received: by 10.223.164.202 with SMTP id h10csp4895490wrb; Tue, 21 Nov 2017 01:15:09 -0800 (PST) X-Google-Smtp-Source: AGs4zMZ5C8Msqr/QdeEqWx+uWJMP7DYedWTwqlct9LmNiphX9xhSBs6tpjlFJ+s+TVOPBONn3NCk X-Received: by 10.84.246.137 with SMTP id m9mr16910036pll.130.1511255709445; Tue, 21 Nov 2017 01:15:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1511255709; cv=none; d=google.com; s=arc-20160816; b=U7rCYWbpNVgmPEVcDM+6stMpOn8eCuCxN59p7WTE/4b0AYYpZM2AikRNyui+rUNppf vA59WuuTl5+t1qH+FZhBMBUTtBVKmDsLEaMkgNcoLzgfjeql1gDv/H4vqa7dRiMpcPv+ /a66/UDxWjyj62gGJPry9j19LyF1s0z1hyEIg5LGUjvcFTN8a8+/0Z7ss4PxDAPoYK7a JxuY08UWZHMOoU24G124f/zqNBlsHQhc4WrxRWRuQRYs7DU5mEMydYk3JmQ1Jav5wPMa fOxh5zXLJpk2gcwdvy+q3GtZPPOVQz3rbmznJf0LGIoxLkyvUavIEO8hH3l3qk898lON 64mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-language :content-transfer-encoding:in-reply-to:mime-version:user-agent:date :message-id:from:references:cc:to:subject:dmarc-filter :dkim-signature:dkim-signature:arc-authentication-results; bh=ta8ooZjUGZIb1SfFatpOXEzRwAL7sir8TvO/VIMVyTc=; b=uFuiFqlLbMy/nEAU/rCGhsFLcAbFBYsptulTU4YYJTTuaIwMJGPzPfJUpCNhHxtnqG ez327dSwtS0yGHKqvyizQwaFjyFio//FKKzXgHA4NUKZRyPZxyztaCNzrclkpNDwKV9N 0biaJ/6Ow4BavVldsPLhXRCt8R9umO40MRPsyG31HM6TWRn2fJSN6UECLvjR7j63Nr5u l5z5ohDNCC9+oiueckqLp3jIk0CChHWm3F3+RS5932k6gmyVnbYg0FJrVpiTv+w78Zyw 6XQfjamdGJyg3cvFdJGqo8Ypymzzl20iYie6Rg0Z2eE6xqRvRsvO0x8KvUE9n1Unuue7 yl6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=fT5mExCb; dkim=pass header.i=@codeaurora.org header.s=default header.b=Dj57jrus; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v8si10005722pgs.358.2017.11.21.01.14.58; Tue, 21 Nov 2017 01:15:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=fT5mExCb; dkim=pass header.i=@codeaurora.org header.s=default header.b=Dj57jrus; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751483AbdKUJMs (ORCPT + 72 others); Tue, 21 Nov 2017 04:12:48 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:34106 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750794AbdKUJMp (ORCPT ); Tue, 21 Nov 2017 04:12:45 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 34F40607E2; Tue, 21 Nov 2017 09:12:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511255565; bh=UvQ+eRYIIYjwnVJw8WDiWZS2Kh396Tgm2PGAgHvd6zk=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=fT5mExCb4vZkRvgv4bAX04KzkOqimceuYBUxC6T4ewiimJ+mKAmdua1Dhxg9x0vId WtysnoEeOJ+W8G9g/t7GTNjRVsEwfOhH6MZfruClangKXvyDulPLA1TzwmX+VC3sFP +ZWnvJ09AUIOUav/qynj50fKD3JdHUNvoT14UUoU= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from [10.252.214.208] (blr-c-bdr-fw-01_globalnat_allzones-outside.qualcomm.com [103.229.19.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: tirupath@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 3447360351; Tue, 21 Nov 2017 09:12:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1511255564; bh=UvQ+eRYIIYjwnVJw8WDiWZS2Kh396Tgm2PGAgHvd6zk=; h=Subject:To:Cc:References:From:Date:In-Reply-To:From; b=Dj57jrusWL6Jb/6EMrSb6U2nfI9WGdF0jmVX4PDKsGP5u8LNqtk5p3f6SQjHt5nFW VDxihsiLOKuDbtgf/rdFKDuazSGlEvUXncj9z2hDtyTisd9LKdFH9hk9saz9s7ubCp kVgvCq7nvEWu4xTq4tNYJYLZnmwUp5/c3ddtI9xY= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 3447360351 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=tirupath@codeaurora.org Subject: Re: [PATCH V6] clk: qcom: Add spmi_pmic clock divider support To: Stephen Boyd Cc: mturquette@baylibre.com, robh+dt@kernel.org, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org References: <1510912127-4582-1-git-send-email-tirupath@codeaurora.org> <20171117235611.GA13301@codeaurora.org> From: Tirupathi Reddy T Message-ID: <6e6399c9-f0a5-3048-d318-2bfc1ba85ded@codeaurora.org> Date: Tue, 21 Nov 2017 14:42:35 +0530 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.4.0 MIME-Version: 1.0 In-Reply-To: <20171117235611.GA13301@codeaurora.org> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 7bit Content-Language: en-US Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/18/2017 5:26 AM, Stephen Boyd wrote: > On 11/17, Tirupathi Reddy wrote: >> diff --git a/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt >> new file mode 100644 >> index 0000000..2cf2aba >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt > Please move this to qcom,spmi-clkdiv.txt like other qcom bindings. Addressed in next patch version[7] > >> @@ -0,0 +1,59 @@ >> +Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv) >> + >> +clkdiv configures the clock frequency of a set of outputs on the PMIC. >> +These clocks are typically wired through alternate functions on >> +gpio pins. >> + >> +======================= >> +Properties >> +======================= >> + >> +- compatible >> + Usage: required >> + Value type: >> + Definition: must be "qcom,spmi-clkdiv". >> + >> +- reg >> + Usage: required >> + Value type: >> + Definition: base address of CLKDIV peripherals. >> + >> +- qcom,num-clkdivs >> + Usage: required >> + Value type: >> + Definition: number of CLKDIV peripherals. > Would it work if we read the registers and looked for the clkdiv > subtype ID? If we read something that doesn't match, break and > stop adding clks? Or does reading the next "peripheral" cause > some sort of crash and burn scenario where the device see an > access control violation? Would be interesting to do it that way > and avoid needing a new property in DT. I feel it is better to go with the current design as we beforehand know the #div-clk peripherals in a PMIC. Reading the next peripheral might result in an unknown failure if there is no real peripheral there (PMIC peripherals are not in contiguous address space). >> + >> + >> + parent_name = of_clk_get_parent_name(of_node, 0); >> + if (!parent_name) { >> + dev_err(dev, "missing parent clock\n"); >> + return -ENODEV; >> + } >> + >> + init.parent_names = &parent_name; >> + init.num_parents = 1; >> + init.ops = &clk_spmi_pmic_div_ops; >> + >> + for (i = 0, clkdiv = cc->clks; i < nclks; i++) { >> + spin_lock_init(&clkdiv[i].lock); >> + clkdiv[i].base = start + i * 0x100; >> + clkdiv[i].regmap = regmap; >> + clkdiv[i].cxo_period_ns = NSEC_PER_SEC / cxo_hz; >> + init.name = kasprintf(GFP_KERNEL, "div_clk%d", i + 1); > Hmm. Maybe we should just have this on the stack. 20 characters > should be plenty? Addressed in next patch version[7] >> + clkdiv[i].hw.init = &init; >> + >> + ret = devm_clk_hw_register(dev, &clkdiv[i].hw); >> + kfree(init.name); /* clk framework made a copy */ >> + if (ret) >> + return ret; >> + } >> + >> + return of_clk_add_hw_provider(of_node, spmi_pmic_div_clk_hw_get, cc); >> +} >> + >> +static int spmi_pmic_clkdiv_remove(struct platform_device *pdev) >> +{ >> + of_clk_del_provider(pdev->dev.of_node); >> + >> + return 0; > This can use devm now. Addressed in next patch version. >> +} >> + >> +static const struct of_device_id spmi_pmic_clkdiv_match_table[] = { >> + { .compatible = "qcom,spmi-clkdiv" }, >> + { /* sentinel */ } >> +}; > Nice! Thanks From 1584429376775695086@xxx Sat Nov 18 18:26:42 +0000 2017 X-GM-THRID: 1584337738313871649 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread