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[209.132.180.67]) by mx.google.com with ESMTP id 70si4908003ple.808.2017.11.18.10.26.28; Sat, 18 Nov 2017 10:26:42 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=RwFiXelh; dkim=pass header.i=@codeaurora.org header.s=default header.b=QiYbTX06; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1423362AbdKQX4a (ORCPT + 93 others); Fri, 17 Nov 2017 18:56:30 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:37100 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1423341AbdKQX4O (ORCPT ); Fri, 17 Nov 2017 18:56:14 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id 16F97606DB; Fri, 17 Nov 2017 23:56:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1510962973; bh=fPO/GRBzh37/8nU622INeOx4g0nwUFl9pH4I7uYDLYg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=RwFiXelhsCvHh5co8gbaNudjHppU15dtYIG0RHvmEOUUuIHnnc1Drfei3QkEKsr7G rlx7TFdZ65EjQERnJ3o0eJ6Lgd9JiBJ4Z5c7GfXEUKOK6I/n8ZNu/OFWZJfRUKuwFN Bvp1l9d/+y8g0cKEpZR86kbHAfLjVWICrh2f6ie4= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from localhost (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher DHE-RSA-AES128-SHA (128/128 bits)) (No client certificate requested) (Authenticated sender: sboyd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 0D70F602A3; Fri, 17 Nov 2017 23:56:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1510962972; bh=fPO/GRBzh37/8nU622INeOx4g0nwUFl9pH4I7uYDLYg=; h=Date:From:To:Cc:Subject:References:In-Reply-To:From; b=QiYbTX067YgNLu9+/QY/I3Od1xtPQmmULtjtIIUg4IPqzGCd4egMOobsYr4H0IPF2 h4e6/DHZunalwaa9h72SQu/rsU60saKVpUU2B4M9AbFa0OFJcT80ykvMF8bDF7fCpq z5/zliMBCFJl3qXvYLkzyhPLfip7YbPEYGPWv1v4= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 0D70F602A3 Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=sboyd@codeaurora.org Date: Fri, 17 Nov 2017 15:56:11 -0800 From: Stephen Boyd To: Tirupathi Reddy Cc: mturquette@baylibre.com, robh+dt@kernel.org, mark.rutland@arm.com, andy.gross@linaro.org, david.brown@linaro.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org Subject: Re: [PATCH V6] clk: qcom: Add spmi_pmic clock divider support Message-ID: <20171117235611.GA13301@codeaurora.org> References: <1510912127-4582-1-git-send-email-tirupath@codeaurora.org> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1510912127-4582-1-git-send-email-tirupath@codeaurora.org> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On 11/17, Tirupathi Reddy wrote: > diff --git a/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt > new file mode 100644 > index 0000000..2cf2aba > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/clk-spmi-pmic-div.txt Please move this to qcom,spmi-clkdiv.txt like other qcom bindings. > @@ -0,0 +1,59 @@ > +Qualcomm Technologies, Inc. SPMI PMIC clock divider (clkdiv) > + > +clkdiv configures the clock frequency of a set of outputs on the PMIC. > +These clocks are typically wired through alternate functions on > +gpio pins. > + > +======================= > +Properties > +======================= > + > +- compatible > + Usage: required > + Value type: > + Definition: must be "qcom,spmi-clkdiv". > + > +- reg > + Usage: required > + Value type: > + Definition: base address of CLKDIV peripherals. > + > +- qcom,num-clkdivs > + Usage: required > + Value type: > + Definition: number of CLKDIV peripherals. Would it work if we read the registers and looked for the clkdiv subtype ID? If we read something that doesn't match, break and stop adding clks? Or does reading the next "peripheral" cause some sort of crash and burn scenario where the device see an access control violation? Would be interesting to do it that way and avoid needing a new property in DT. > + > + > + parent_name = of_clk_get_parent_name(of_node, 0); > + if (!parent_name) { > + dev_err(dev, "missing parent clock\n"); > + return -ENODEV; > + } > + > + init.parent_names = &parent_name; > + init.num_parents = 1; > + init.ops = &clk_spmi_pmic_div_ops; > + > + for (i = 0, clkdiv = cc->clks; i < nclks; i++) { > + spin_lock_init(&clkdiv[i].lock); > + clkdiv[i].base = start + i * 0x100; > + clkdiv[i].regmap = regmap; > + clkdiv[i].cxo_period_ns = NSEC_PER_SEC / cxo_hz; > + init.name = kasprintf(GFP_KERNEL, "div_clk%d", i + 1); Hmm. Maybe we should just have this on the stack. 20 characters should be plenty? > + clkdiv[i].hw.init = &init; > + > + ret = devm_clk_hw_register(dev, &clkdiv[i].hw); > + kfree(init.name); /* clk framework made a copy */ > + if (ret) > + return ret; > + } > + > + return of_clk_add_hw_provider(of_node, spmi_pmic_div_clk_hw_get, cc); > +} > + > +static int spmi_pmic_clkdiv_remove(struct platform_device *pdev) > +{ > + of_clk_del_provider(pdev->dev.of_node); > + > + return 0; This can use devm now. > +} > + > +static const struct of_device_id spmi_pmic_clkdiv_match_table[] = { > + { .compatible = "qcom,spmi-clkdiv" }, > + { /* sentinel */ } > +}; Nice! -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, a Linux Foundation Collaborative Project From 1584390853770381054@xxx Sat Nov 18 08:14:24 +0000 2017 X-GM-THRID: 1584337738313871649 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread