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[209.132.180.67]) by mx.google.com with ESMTP id i12si3396722plk.377.2017.11.17.12.43.41; Fri, 17 Nov 2017 12:43:54 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=aouAQq0Y; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1759383AbdKQQ6H (ORCPT + 93 others); Fri, 17 Nov 2017 11:58:07 -0500 Received: from mail-it0-f52.google.com ([209.85.214.52]:45894 "EHLO mail-it0-f52.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1759349AbdKQQ5z (ORCPT ); Fri, 17 Nov 2017 11:57:55 -0500 Received: by mail-it0-f52.google.com with SMTP id l196so4791526itl.4 for ; Fri, 17 Nov 2017 08:57:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:sender:in-reply-to:references:from:date:message-id :subject:to:cc:content-transfer-encoding; bh=Dq/eICTzV0UxJll5j/3iZgqVM6TRvz2RlIKaAz4YiYI=; b=aouAQq0YSlekUgsBq7pnoiprMWprSGzXIORP2ikaONGxD2zcgPokWKwfruLtVCnlM0 Ls2ufPI5u+OiNEoKvrnN3qFh84yM9HKenYwNYJzUc7abAy5LLBlojvRt+SuRSkabtQkV 8Rv9v7gpjOquQP2T1sVVmAAtgxzQFFMF9B0ZSqt+gWW8wq1GcJF8NANmjwjZJgEZVpXk h7kuYt1ql/BZgO6BWPKhs2LzNZKYZ2GJkJIuKbsPJjCqrsQDMm6ZoWL+xqiD06HtAxll cYhQR9EV7REre0bXO95pSq3r8Afq4gyVVfgGkC4+JW3twN8aP7+fe3JWlC+TNhE9ep2i 5/+Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:sender:in-reply-to:references:from :date:message-id:subject:to:cc:content-transfer-encoding; bh=Dq/eICTzV0UxJll5j/3iZgqVM6TRvz2RlIKaAz4YiYI=; b=BLZfZvknRFeGEmtM4rDcoJRu0V2KIIDdiB4eHZZe3FviyThm49yPDfZAHZNzjwUEdz IXbkvxSQW1Yme9iUomnTMa27qbAqNRA35VYu2U9ymfhjwoSBSDFptMtCqApqllT5tebf BycthZfp97GOtfP75apX0QW+Lcoi/YMbFxRR2eYQn/XWW1KyYR4cNmX0EVF2FtStwdFw PztIxvgX9a7xaqGXY8Rlr3qBrh9ctZIx5ZBkhhI52zQsQAFKlKfKfT+sMcK74of4lba/ 01u3fZgi5qsCWj7LX7K1IBzNHCVzKjcrd8yjIyx/+DuCCBZB3KL75RCJiSsFLhEL85Q1 fhHg== X-Gm-Message-State: AJaThX40xhx4QBi136PRZDyILM/TDhc3kA0Rvs1/55HXz9ZDlgdvAaMf m4Zm5hePFjXQXd89qbKkzyTE5qMLMnCDQRouQ3Y= X-Received: by 10.36.189.205 with SMTP id x196mr7334315ite.152.1510937874509; Fri, 17 Nov 2017 08:57:54 -0800 (PST) MIME-Version: 1.0 Received: by 10.107.88.8 with HTTP; Fri, 17 Nov 2017 08:57:53 -0800 (PST) In-Reply-To: <26729c32-cfd6-82e0-b370-a46ca951adea@gmail.com> References: <26729c32-cfd6-82e0-b370-a46ca951adea@gmail.com> From: Linus Torvalds Date: Fri, 17 Nov 2017 08:57:53 -0800 X-Google-Sender-Auth: imMplnuLJSFFLMu6AjkAsS60J6o Message-ID: Subject: Re: [git pull] drm for v4.15 To: =?UTF-8?Q?Nicolai_H=C3=A4hnle?= Cc: Dave Airlie , dri-devel , LKML Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, Nov 17, 2017 at 4:51 AM, Nicolai H=C3=A4hnle w= rote: > > This raises the question of how people feel about putting the source > database into the kernel (most likely as XML in our case) and > auto-generating the headers from there instead. I suspect that at least in some cases, the "source" database may be a bit too sensitive. It may have various comments about errata, and may even be part of the whole hardware build system (ie it might be munged from verilog/vhdl) > I've been pondering doing this in Mesa for radeonsi for quite some time n= ow. What personally annoys me most about a lot of generated header files (not all, but a _lot_) is that exactly because they are generated, they are often inexcusably stupid. So say that you have a block of status registers, all of which have a certain base pattern. Every single auto-generated header file I have ever seen takes the brute-force approach of just enumerating them all separately as independent things. Which makes the header file a huge mess of repeated almost-identical register defines. But it's not even the _size_ of the header file that then annoys me, it's that it's not just big, but inflexible. Often, on a source level, you may actually be in the situation where you get an index to the thing, and then you do switch (index) { case X: access_using(REGISTERX_DEFINITION); case Y: access_using(REGISTERY_DEFINITION); ... or similar. When a _smarter_ auto-generated file would actually take advantage of the language features (whether preprocessor or dynamic), and actually allow for access_using(REGISTER_DEFINITION(index)) instead. Or - a variation of the above - it's not that the register definitions for _one_ core have that kind of regularity, but you have it for a while family of products, and because you autogenerate, you auto-generate the stupid "repat the exact same thing with different names" model, and then you have (instead of the index thing) you have the "chip family" thing that you switch on. To see the effects of this, I picked something at random from one of those huge AMD header files. I swear. It was entirely at random, and the first thing I picked. Do this: git grep PCIE_UNCORR_ERR_MASK and tell me that there isn't any room for making these things smarter. Btw, not a single of those defines are actually _used_. Again, that pattern was entirely randomly picked from the largest header file we have. People say "it's a ton of work to do it by hand". They'd be right. I'm not saying you should do it by hand. But "automation" does not always need to mean "completely mindlessly stupid" either. Linus From 1584291155511467858@xxx Fri Nov 17 05:49:44 +0000 2017 X-GM-THRID: 1584194585945726173 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread