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Subject: Re: [PATCH] drivers: base: cacheinfo: support DT overrides for cache
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To:     Sudeep Holla <sudeep.holla@arm.com>
References: <1510837089-5951-1-git-send-email-tanxiaojun@huawei.com>
 <ce8466bc-86c9-8538-b144-1fa3ee4cbf38@arm.com> <5A0E45D3.1090803@huawei.com>
 <20171117111351.GA20137@e107155-lin>
CC:     <gregkh@linuxfoundation.org>, <linux-kernel@vger.kernel.org>
From:   Tan Xiaojun <tanxiaojun@huawei.com>
Message-ID: <5A122D74.9000001@huawei.com>
Date:   Mon, 20 Nov 2017 09:18:44 +0800
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On 2017/11/17 19:13, Sudeep Holla wrote:
> On Fri, Nov 17, 2017 at 10:13:39AM +0800, Tan Xiaojun wrote:
>> On 2017/11/16 23:23, Sudeep Holla wrote:
>>>
>>> I assume L3 is outer non-architected system cache.
>>>
>>
>> Yes.
>>
> 
> Good.
> 
>> OK. That's fine. I will test this.
> 
> Thanks.
> 
>> By the way, Arm64 tend to use acpi way to boot now. Is there some
>> suitable solution for acpi?
>>
> 
> Yes Jeremy is currently working on it[1] and IIRC Xiongfeng Wang from Huawei
> was testing them[2]. You need to talk to him ;)
> 
> --
> Regards,
> Sudeep
> 
> [1] https://marc.info/?l=linux-pm&m=151026155606677&w=2
> [2] https://marc.info/?l=linux-pm&m=151073816218307&w=2
> 
> 
> .
> 

OK. Thank you for telling me this.

Xiaojun.


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