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From:   "M.h. Lian" <minghuan.lian@nxp.com>
To:     Leo Li <leoyang.li@nxp.com>,
        Kishon Vijay Abraham I <kishon@ti.com>,
        Xiaowei Bao <xiaowei.bao@nxp.com>,
        "robh+dt@kernel.org" <robh+dt@kernel.org>,
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        Madalin-cristian Bucur <madalin.bucur@nxp.com>,
        "Sumit Garg" <sumit.garg@nxp.com>, "Y.b. Lu" <yangbo.lu@nxp.com>,
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        "Mingkai Hu" <mingkai.hu@nxp.com>
Subject: RE: [PATCHv4 1/3] ARMv8: dts: ls1046a: add the property of IB and OB
Thread-Topic: [PATCHv4 1/3] ARMv8: dts: ls1046a: add the property of IB and OB
Thread-Index: AQHTWdlvPz5UcqenbEesNuj1VI+v6qMNJNSAgAD68oCAA3eYIA==
Date:   Mon, 13 Nov 2017 02:35:48 +0000
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> -----Original Message-----
> From: Leo Li
> Sent: Saturday, November 11, 2017 5:21 AM
> To: Kishon Vijay Abraham I <kishon@ti.com>; Xiaowei Bao
> <xiaowei.bao@nxp.com>; robh+dt@kernel.org; mark.rutland@arm.com;
> catalin.marinas@arm.com; will.deacon@arm.com; bhelgaas@google.com;
> shawnguo@kernel.org; Madalin-cristian Bucur <madalin.bucur@nxp.com>;
> Sumit Garg <sumit.garg@nxp.com>; Y.b. Lu <yangbo.lu@nxp.com>; Andy Tang
> <andy.tang@nxp.com>; jingoohan1@gmail.com; pbrobinson@gmail.com;
> songxiaowei@hisilicon.com; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> pci@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Z.q. Hou
> <zhiqiang.hou@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; M.h. Lian
> <minghuan.lian@nxp.com>
> Subject: RE: [PATCHv4 1/3] ARMv8: dts: ls1046a: add the property of IB an=
d OB
>=20
>=20
>=20
> > -----Original Message-----
> > From: Kishon Vijay Abraham I [mailto:kishon@ti.com]
> > Sent: Friday, November 10, 2017 12:22 AM
> > To: Xiaowei Bao <xiaowei.bao@nxp.com>; robh+dt@kernel.org;
> > mark.rutland@arm.com; catalin.marinas@arm.com; will.deacon@arm.com;
> > bhelgaas@google.com; shawnguo@kernel.org; Madalin-cristian Bucur
> > <madalin.bucur@nxp.com>; Sumit Garg <sumit.garg@nxp.com>; Y.b. Lu
> > <yangbo.lu@nxp.com>; hongtao.jia@nxp.com; Andy Tang
> > <andy.tang@nxp.com>; Leo Li <leoyang.li@nxp.com>;
> > jingoohan1@gmail.com; pbrobinson@gmail.com; songxiaowei@hisilicon.com;
> > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org;
> > linux- kernel@vger.kernel.org; linux-pci@vger.kernel.org; linuxppc-
> > dev@lists.ozlabs.org; Z.q. Hou <zhiqiang.hou@nxp.com>; Mingkai Hu
> > <mingkai.hu@nxp.com>; M.h. Lian <minghuan.lian@nxp.com>
> > Subject: Re: [PATCHv4 1/3] ARMv8: dts: ls1046a: add the property of IB
> > and OB
> >
> > Hi Bao,
> >
> > On Friday 10 November 2017 09:18 AM, Bao Xiaowei wrote:
> > > Add the property of inbound and outbound windows number for ep driver=
.
> > >
> > > Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
> > > Acked-by: Minghuan Lian <minghuan.Lian@nxp.com>
> > > ---
> > >  v2:
> > >  - no change
> > >  v3:
> > >  - modify the commit message
> > >  v4:
> > >  - no change
> > >
> > >  arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi | 6 ++++++
> > >  1 file changed, 6 insertions(+)
> >
> > $subject should start with something like
> > arm64: dts: ls1046a: **
> > >
> > > diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > > b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > > index 06b5e12d04d8..f8332669663c 100644
> > > --- a/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > > +++ b/arch/arm64/boot/dts/freescale/fsl-ls1046a.dtsi
> > > @@ -674,6 +674,8 @@
> > >  			device_type =3D "pci";
> > >  			dma-coherent;
> > >  			num-lanes =3D <4>;
> > > +			num-ib-windows =3D <6>;
> > > +			num-ob-windows =3D <6>;
> >
> > EP specific properties shouldn't be added in RC dt node. Ideally you
> > should have a separate dt node for RC and EP.
>=20
> It is a single PCIe controller which can be configured to either RC mode =
or EP
> mode.  Wouldn't it conflict with the device tree principles to have two d=
evice
> tree nodes for the same PCIe controller?  And obviously the two modes can=
not
> be used at the same time so we cannot have two drivers both probe on the
> same hardware.
>=20
[Minghuan Lian]  There is only one PCIe dts node in the dts file. PCIe dts =
node describes the PCIe controller's hardware properties and does not have =
work mode.  The new properties  "num-ib-windows " and "num-ob-windows" are =
used to describe the inbound/outbound window number included in the PCIe ha=
rdware. These windows are used in both RC and EP mode.  We can change work =
mode when resetting via RCW(reset configuration word).


> Regards,
> Leo

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