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[209.132.180.67]) by mx.google.com with ESMTP id y7si17341475plk.655.2017.11.14.17.50.11; Tue, 14 Nov 2017 17:50:22 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=Kns+0kRX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757442AbdKOAmc (ORCPT + 87 others); Tue, 14 Nov 2017 19:42:32 -0500 Received: from mail-ot0-f195.google.com ([74.125.82.195]:43041 "EHLO mail-ot0-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756826AbdKOAmD (ORCPT ); Tue, 14 Nov 2017 19:42:03 -0500 Received: by mail-ot0-f195.google.com with SMTP id s12so11923884otc.0; Tue, 14 Nov 2017 16:42:03 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=6qLkiBJKO6zknxDBTeJpmf3tcP8Q0I3x/rIhrHjR1b0=; b=Kns+0kRXFvdeE2T5mtkbm0IQ75SxrFU6kF7Lr9d9OuXDYRd6gNunH0EcY5mpsTrpqd zjqHXDuKQ5ME0/N9USJj4pWLkWMLNsAVtx7ZPbwJ32deboEkEoxks29JT9IWw4P8JSZL j+xq1NnK3csYFzyEwkNAcUY8BoWBuf5cPGu0O4t1mJZkZkEaP2JFVLjLdGvetnUMGE/6 NMhQZep0vnqdUSuST9m+IfRBE6nZB/SFJ+nEuerLS3Qel8Iu1gnB6XdpL8hh477fE1z9 JC6IpVD0myMTn697jY7Kqk8syGPgI/Urg/PxYbBXyaJoxJibVaczc/8u+GQBcxhE4JzD V7/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=6qLkiBJKO6zknxDBTeJpmf3tcP8Q0I3x/rIhrHjR1b0=; b=Ig2Am7IRTPp8Gp8YOI9b0OGYv8GyloLkJxBltINQ/PPR52Skc4IOsPqIzBTsOdpwzQ T8CRRpY+64lKfzBcxKLUBKwPFFK2TMeVIEGKzidTyODoZ1VeYxqLeX76CbGHZ2VvUliK qzRgwRrXkz7Z8yFIWDDcWrxNaV+YOMbB/L6ls8dSYwQjzyiP9E3P5iSTujg8KIlP415A XZB/R+KdzzqNx3HfIY7SAZKrLJTHck2ODoXgMh/Itl0RkkK0rvkPth00j1ijKHX8GBhc NDRuOAFyWAnI/dNVmv0loTakfr3PuESMxNtInerGQ1dBH2eQOAFv8ghj8S0Bxoopm7LR NZoQ== X-Gm-Message-State: AJaThX6Jwl7L1t4eQwhxJYVbxz3aq/8du8/K6+jVTb4AWdiVykUYCl4Y w6p7rDa7XMzovC/G8JZLPx+hCf8tIPOtZKKXY0w= X-Received: by 10.157.90.24 with SMTP id v24mr9175779oth.380.1510706523127; Tue, 14 Nov 2017 16:42:03 -0800 (PST) MIME-Version: 1.0 Received: by 10.74.53.27 with HTTP; Tue, 14 Nov 2017 16:42:02 -0800 (PST) In-Reply-To: <1510584031-36240-5-git-send-email-pbonzini@redhat.com> References: <1510584031-36240-1-git-send-email-pbonzini@redhat.com> <1510584031-36240-5-git-send-email-pbonzini@redhat.com> From: Wanpeng Li Date: Wed, 15 Nov 2017 08:42:02 +0800 Message-ID: Subject: Re: [PATCH 4/5] KVM: x86: add support for emulating UMIP To: Paolo Bonzini Cc: "linux-kernel@vger.kernel.org" , kvm , Radim Krcmar Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 2017-11-13 22:40 GMT+08:00 Paolo Bonzini : > The User-Mode Instruction Prevention feature present in recent Intel > processor prevents a group of instructions (sgdt, sidt, sldt, smsw, and > str) from being executed with CPL > 0. Otherwise, a general protection > fault is issued. > > UMIP instructions in general are also able to trigger vmexits, so we can > actually emulate UMIP on older processors. This commit sets up the > infrastructure so that kvm-intel.ko and kvm-amd.ko can set the UMIP > feature bit for CPUID even if the feature is not actually available > in hardware. > > Signed-off-by: Paolo Bonzini Reviewed-by: Wanpeng Li > --- > arch/x86/include/asm/kvm_host.h | 1 + > arch/x86/kvm/cpuid.c | 2 ++ > arch/x86/kvm/svm.c | 6 ++++++ > arch/x86/kvm/vmx.c | 6 ++++++ > 4 files changed, 15 insertions(+) > > diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h > index 1b005ccf4d0b..f0a4f107a97f 100644 > --- a/arch/x86/include/asm/kvm_host.h > +++ b/arch/x86/include/asm/kvm_host.h > @@ -1004,6 +1004,7 @@ struct kvm_x86_ops { > void (*handle_external_intr)(struct kvm_vcpu *vcpu); > bool (*mpx_supported)(void); > bool (*xsaves_supported)(void); > + bool (*umip_emulated)(void); > > int (*check_nested_events)(struct kvm_vcpu *vcpu, bool external_intr); > > diff --git a/arch/x86/kvm/cpuid.c b/arch/x86/kvm/cpuid.c > index 77fb8732b47b..2b3b06458f6f 100644 > --- a/arch/x86/kvm/cpuid.c > +++ b/arch/x86/kvm/cpuid.c > @@ -327,6 +327,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > unsigned f_invpcid = kvm_x86_ops->invpcid_supported() ? F(INVPCID) : 0; > unsigned f_mpx = kvm_mpx_supported() ? F(MPX) : 0; > unsigned f_xsaves = kvm_x86_ops->xsaves_supported() ? F(XSAVES) : 0; > + unsigned f_umip = kvm_x86_ops->umip_emulated() ? F(UMIP) : 0; > > /* cpuid 1.edx */ > const u32 kvm_cpuid_1_edx_x86_features = > @@ -473,6 +474,7 @@ static inline int __do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function, > entry->ebx |= F(TSC_ADJUST); > entry->ecx &= kvm_cpuid_7_0_ecx_x86_features; > cpuid_mask(&entry->ecx, CPUID_7_ECX); > + entry->ecx |= f_umip; > /* PKU is not yet implemented for shadow paging. */ > if (!tdp_enabled || !boot_cpu_has(X86_FEATURE_OSPKE)) > entry->ecx &= ~F(PKU); > diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c > index 0e68f0b3cbf7..be7fc7e5ee7e 100644 > --- a/arch/x86/kvm/svm.c > +++ b/arch/x86/kvm/svm.c > @@ -5174,6 +5174,11 @@ static bool svm_xsaves_supported(void) > return false; > } > > +static bool svm_umip_emulated(void) > +{ > + return false; > +} > + > static bool svm_has_wbinvd_exit(void) > { > return true; > @@ -5485,6 +5490,7 @@ static void svm_setup_mce(struct kvm_vcpu *vcpu) > .invpcid_supported = svm_invpcid_supported, > .mpx_supported = svm_mpx_supported, > .xsaves_supported = svm_xsaves_supported, > + .umip_emulated = svm_umip_emulated, > > .set_supported_cpuid = svm_set_supported_cpuid, > > diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c > index 8917e100ddeb..6c474c94e154 100644 > --- a/arch/x86/kvm/vmx.c > +++ b/arch/x86/kvm/vmx.c > @@ -9095,6 +9095,11 @@ static bool vmx_xsaves_supported(void) > SECONDARY_EXEC_XSAVES; > } > > +static bool vmx_umip_emulated(void) > +{ > + return false; > +} > + > static void vmx_recover_nmi_blocking(struct vcpu_vmx *vmx) > { > u32 exit_intr_info; > @@ -12038,6 +12043,7 @@ static void vmx_setup_mce(struct kvm_vcpu *vcpu) > .handle_external_intr = vmx_handle_external_intr, > .mpx_supported = vmx_mpx_supported, > .xsaves_supported = vmx_xsaves_supported, > + .umip_emulated = vmx_umip_emulated, > > .check_nested_events = vmx_check_nested_events, > > -- > 1.8.3.1 > > From 1583962323248990545@xxx Mon Nov 13 14:43:05 +0000 2017 X-GM-THRID: 1583962323248990545 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread