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[209.132.180.67]) by mx.google.com with ESMTP id h12si8416115pgq.681.2017.11.13.22.37.44; Mon, 13 Nov 2017 22:37:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752231AbdKNGfj (ORCPT + 89 others); Tue, 14 Nov 2017 01:35:39 -0500 Received: from LGEAMRELO13.lge.com ([156.147.23.53]:54204 "EHLO lgeamrelo13.lge.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751030AbdKNGfc (ORCPT ); Tue, 14 Nov 2017 01:35:32 -0500 Received: from unknown (HELO lgeamrelo04.lge.com) (156.147.1.127) by 156.147.23.53 with ESMTP; 14 Nov 2017 15:35:28 +0900 X-Original-SENDERIP: 156.147.1.127 X-Original-MAILFROM: iamjoonsoo.kim@lge.com Received: from unknown (HELO localhost) (10.177.222.138) by 156.147.1.127 with ESMTP; 14 Nov 2017 15:35:27 +0900 X-Original-SENDERIP: 10.177.222.138 X-Original-MAILFROM: iamjoonsoo.kim@lge.com Date: Tue, 14 Nov 2017 15:40:37 +0900 From: Joonsoo Kim To: Tony Lindgren Cc: Pavel Machek , pali.rohar@gmail.com, sre@kernel.org, kernel list , linux-arm-kernel , linux-omap@vger.kernel.org, khilman@kernel.org, aaro.koskinen@iki.fi, ivo.g.dimitrov.75@gmail.com, patrikbachan@gmail.com, serge@hallyn.com, abcloriens@gmail.com, "Aneesh Kumar K.V" , Vlastimil Babka , Andrew Morton , Stephen Rothwell , Russell King Subject: Re: n900 in next-20170901 Message-ID: <20171114064036.GB16969@js1304-P5Q-DELUXE> References: <20171109000801.GA23982@js1304-P5Q-DELUXE> <20171109001113.GZ28152@atomide.com> <20171109003639.GB23982@js1304-P5Q-DELUXE> <20171109035031.GA24383@js1304-P5Q-DELUXE> <20171109150854.GC28152@atomide.com> <20171110001315.GA29669@js1304-P5Q-DELUXE> <20171110032610.GJ28152@atomide.com> <20171110063727.GA32073@js1304-P5Q-DELUXE> <20171110153620.GO28152@atomide.com> <20171113211530.GY28152@atomide.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171113211530.GY28152@atomide.com> User-Agent: Mutt/1.5.21 (2010-09-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 13, 2017 at 01:15:30PM -0800, Tony Lindgren wrote: > * Tony Lindgren [171110 07:36]: > > * Joonsoo Kim [171110 06:34]: > > > On Thu, Nov 09, 2017 at 07:26:10PM -0800, Tony Lindgren wrote: > > > > +#define OMAP34XX_SRAM_PHYS 0x40200000 > > > > +#define OMAP34XX_SRAM_VIRT 0xd0010000 > > > > +#define OMAP34XX_SRAM_SIZE 0x10000 > > > > > > For my testing environment, vmalloc address space is started at > > > roughly 0xe0000000 so 0xd0010000 would not be valid. > > > > Well we can map it anywhere we want, got any preferences? > > Hmm and I'm also wondering what you do to make vmalloc space to > start at 0xe0000000 instead of 0xd0000000? Please see the another reply. > > The reason I'm asking is because I think we can just move all of > save_secure_ram_context to run from DDR instead of SRAM. But I'd > rather do a minimal patch first that fixes your series and then we > can test the further changes with more time. Okay. I agree to make a minimal patch first and then go next step. > After moving save_secure_ram_context to DDR, we can call > save_secure_ram_context directly with something like: > > args_pa = __pa(omap3_secure_ram_storage); > offset = (unsigned long)omap3_secure_ram_storage - args_pa; > ret = save_secure_ram_context(args_pa, offset); > > > Just that the current save_secure_ram_context uses "high_mask" > > of 0xffff to translate the address. To make this more flexible, > > we need the save_secure_ram_context changes too. So we might > > want to do the static mapping and save_secure_ram_context changes > > as a single patch. > > > > > And, PHYS can be different according to the system type. Maybe either > > > OMAP3_SRAM_PUB_PA or OMAP3_SRAM_PA. It seems that SIZE and TYPE should > > > be considered, too. My understanding is correct? > > > > We can have a static map for the whole SRAM area, see function > > __arm_ioremap_pfn_caller() for the comment "Try to reuse one of the > > static mapping whenever possible". So the different public SRAM start > > addresses and sizes don't matter there. > > And then if save_secure_ram_contet runs in DDR, no static map is > needed. Okay. Thanks. From 1584022210314366684@xxx Tue Nov 14 06:34:58 +0000 2017 X-GM-THRID: 1577552291468010502 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread