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[209.132.180.67]) by mx.google.com with ESMTP id k66si7584433pgk.665.2017.11.09.19.26.52; Thu, 09 Nov 2017 19:27:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755821AbdKJD0S (ORCPT + 83 others); Thu, 9 Nov 2017 22:26:18 -0500 Received: from muru.com ([72.249.23.125]:47768 "EHLO muru.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755694AbdKJD0Q (ORCPT ); Thu, 9 Nov 2017 22:26:16 -0500 Received: from atomide.com (localhost [127.0.0.1]) by muru.com (Postfix) with ESMTPS id BBB54811B; Fri, 10 Nov 2017 03:27:57 +0000 (UTC) Date: Thu, 9 Nov 2017 19:26:10 -0800 From: Tony Lindgren To: Joonsoo Kim Cc: Pavel Machek , pali.rohar@gmail.com, sre@kernel.org, kernel list , linux-arm-kernel , linux-omap@vger.kernel.org, khilman@kernel.org, aaro.koskinen@iki.fi, ivo.g.dimitrov.75@gmail.com, patrikbachan@gmail.com, serge@hallyn.com, abcloriens@gmail.com, "Aneesh Kumar K.V" , Vlastimil Babka , Andrew Morton , Stephen Rothwell , Russell King Subject: Re: n900 in next-20170901 Message-ID: <20171110032610.GJ28152@atomide.com> References: <20171107053313.GA12447@js1304-P5Q-DELUXE> <20171107154842.GP28152@atomide.com> <20171108074645.GA18747@js1304-P5Q-DELUXE> <20171108163413.GU28152@atomide.com> <20171109000801.GA23982@js1304-P5Q-DELUXE> <20171109001113.GZ28152@atomide.com> <20171109003639.GB23982@js1304-P5Q-DELUXE> <20171109035031.GA24383@js1304-P5Q-DELUXE> <20171109150854.GC28152@atomide.com> <20171110001315.GA29669@js1304-P5Q-DELUXE> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20171110001315.GA29669@js1304-P5Q-DELUXE> User-Agent: Mutt/1.9.1 (2017-09-22) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org * Joonsoo Kim [171110 00:10]: > On Thu, Nov 09, 2017 at 07:08:54AM -0800, Tony Lindgren wrote: > > Hmm OK. Does your first patch above now have the initcall issue too? > > It boots if I make that also subsys_initcall and then I get: > > > [ 2.078094] vmalloc_pool_init: DMA: get vmalloc area: d0010000 > > Yes, first patch has the initcall issue and it's intentional in order > to check the theory. I checked following log for this. > > - Boot failure > SRAM_ADDR: omap_map_sram: P: 0x40208000 - 0x4020f000 > SRAM_ADDR: omap_map_sram: V: 0xd0050000 - 0xd0057000 > > - Boot success > SRAM_ADDR: omap_map_sram: P: 0x40208000 - 0x4020f000 > SRAM_ADDR: omap_map_sram: V: 0xd0008000 - 0xd000f000 > > When failure, virtual address for sram is higher than normal one due > to vmalloc area allocation in __dma_alloc_remap(). If it is deferred, > virtual address is the same with success case and then the system work. > > So, my next theory is that there is n900 specific assumption that sram > should have that address. Could you check if any working tree for n900 > which doesn't have my CMA series work or not with adding > "arm/dma: vmalloc area allocation"? Oh I see, sorry I was not following you earlier. So you mean that by adding the vmalloc_pool_init() initcall the va mapping for SRAM changes. And yes, save_secure_ram_context seems to be doing some sketchy virt to phys calculation with sram_phy_addr_mask. Here's a small patch to fix that for your CMA series, maybe you can merge it with your series to avoid breaking booting for git bisect. Then I'll follow up on cleaning up save_secure_ram_context later. Regards, Tony 8< ------------------------- >From tony Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Thu, 9 Nov 2017 17:05:34 -0800 Subject: [PATCH] ARM: OMAP2+: Add static SRAM mapping for save_secure_ram_context With the CMA changes from Joonsoo Kim , it was noticed that n900 stopped booting. After investigating it turned out that n900 save_secure_ram_context does some whacky virtual to physical address translation for the SRAM data address. Let's fix this for CMA changes by adding a static mapping for SRAM on omap3. Then we can follow up with a patch to clean up the address translation in save_secure_ram_context later on. Debugged-by: Joonsoo Kim Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/io.c | 6 ++++++ arch/arm/mach-omap2/iomap.h | 4 ++++ 2 files changed, 10 insertions(+) diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c @@ -139,6 +139,12 @@ static struct map_desc omap243x_io_desc[] __initdata = { #ifdef CONFIG_ARCH_OMAP3 static struct map_desc omap34xx_io_desc[] __initdata = { + { + .virtual = OMAP34XX_SRAM_VIRT, + .pfn = __phys_to_pfn(OMAP34XX_SRAM_PHYS), + .length = OMAP34XX_SRAM_SIZE, + .type = MT_DEVICE + }, { .virtual = L3_34XX_VIRT, .pfn = __phys_to_pfn(L3_34XX_PHYS), diff --git a/arch/arm/mach-omap2/iomap.h b/arch/arm/mach-omap2/iomap.h --- a/arch/arm/mach-omap2/iomap.h +++ b/arch/arm/mach-omap2/iomap.h @@ -123,6 +123,10 @@ * VPOM3430 was not working for Int controller */ +#define OMAP34XX_SRAM_PHYS 0x40200000 +#define OMAP34XX_SRAM_VIRT 0xd0010000 +#define OMAP34XX_SRAM_SIZE 0x10000 + #define L4_PER_34XX_PHYS L4_PER_34XX_BASE /* 0x49000000 --> 0xfb000000 */ #define L4_PER_34XX_VIRT (L4_PER_34XX_PHYS + OMAP2_L4_IO_OFFSET) -- 2.15.0 From 1583635558486662074@xxx Fri Nov 10 00:09:18 +0000 2017 X-GM-THRID: 1577552291468010502 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread