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Message-ID: <1510611246.2515.8.camel@megha-Z97X-UD7-TH>
Subject: Re: [PATCH V1 2/3] perf/x86/intel/bm.c: Add Intel Branch Monitoring
 support
From:   Megha Dey <megha.dey@intel.com>
To:     Thomas Gleixner <tglx@linutronix.de>
Cc:     Peter Zijlstra <peterz@infradead.org>,
        "x86@kernel.org" <x86@kernel.org>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "linux-doc@vger.kernel.org" <linux-doc@vger.kernel.org>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "hpa@zytor.com" <hpa@zytor.com>,
        "andriy.shevchenko@linux.intel.com" 
        <andriy.shevchenko@linux.intel.com>,
        "kstewart@linuxfoundation.org" <kstewart@linuxfoundation.org>,
        "Yu, Yu-cheng" <yu-cheng.yu@intel.com>,
        "Brown, Len" <len.brown@intel.com>,
        "gregkh@linuxfoundation.org" <gregkh@linuxfoundation.org>,
        "acme@kernel.org" <acme@kernel.org>,
        "alexander.shishkin@linux.intel.com" 
        <alexander.shishkin@linux.intel.com>,
        "jolsa@redhat.com" <jolsa@redhat.com>,
        "namhyung@kernel.org" <namhyung@kernel.org>,
        "vikas.shivappa@linux.intel.com" <vikas.shivappa@linux.intel.com>,
        "pombredanne@nexb.com" <pombredanne@nexb.com>,
        "me@kylehuey.com" <me@kylehuey.com>, "bp@suse.de" <bp@suse.de>,
        "Andrejczuk, Grzegorz" <grzegorz.andrejczuk@intel.com>,
        "Luck, Tony" <tony.luck@intel.com>,
        "corbet@lwn.net" <corbet@lwn.net>,
        "Shankar, Ravi V" <ravi.v.shankar@intel.com>
Date:   Mon, 13 Nov 2017 14:14:06 -0800
In-Reply-To: <alpine.DEB.2.20.1711132116490.2097@nanos>
References: <1510435206-16110-1-git-send-email-megha.dey@linux.intel.com>
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         <C440BA31B54DCD4AAC682D2365C8FEE727FF1C3A@ORSMSX111.amr.corp.intel.com>
         <alpine.DEB.2.20.1711132116490.2097@nanos>
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On Mon, 2017-11-13 at 21:25 +0100, Thomas Gleixner wrote:
> On Mon, 13 Nov 2017, Dey, Megha wrote:
> > >-----Original Message-----
> > >From: Peter Zijlstra [mailto:peterz@infradead.org]
> > >Sent: Monday, November 13, 2017 1:00 AM
> > >To: Megha Dey <megha.dey@linux.intel.com>
> > >Cc: x86@kernel.org; linux-kernel@vger.kernel.org; linux-
> 
> Please fix your mail client so it does not add this complete useless
> information to the reply.

Will fix this.
> 
> > >On Sat, Nov 11, 2017 at 01:20:05PM -0800, Megha Dey wrote:
> > >> +/*
> > >> + * Unmask the NMI bit of the local APIC the first time task is
> > >> +scheduled
> > >> + * on a particular CPU.
> > >> + */
> > >> +static void intel_bm_unmask_nmi(void) {
> > >> +	this_cpu_write(bm_unmask_apic, 0);
> > >> +
> > >> +	if (!(this_cpu_read(bm_unmask_apic))) {
> > >> +		apic_write(APIC_LVTPC, APIC_DM_NMI);
> > >> +		this_cpu_inc(bm_unmask_apic);
> > >> +	}
> > >> +}
> > >
> > >What? Why?
> > 
> 
> > Normally, other drivers using perf create an event on every CPU (thereby
> > calling perf_init on every CPU), where this bit(APIC_DM_NMI)is explicitly
> > unmasked.  In our driver, we do not do this (since we are worried only
> > about a particular task) and hence this bit is only disabled on the local
> > APIC where the perf event is initialized.
> >
> > As such, if the task is scheduled out to some other CPU, this bit is set
> > and hence would stop the interrupt from reaching the processing core.
> 
> Still that code makes no sense at all and certainly does not do what you
> claim it does:
> 
> > >> +	this_cpu_write(bm_unmask_apic, 0);
> > >> +
> > >> +	if (!(this_cpu_read(bm_unmask_apic))) {
> 
> So first you write the per cpu variable to 0 and then you check whether it
> is zero, which is pointless obviously.

yes, I see your point. The logic is flawed. Will fix this.
> 
> > >
> > >> +static int intel_bm_event_add(struct perf_event *event, int mode) {
> 
> Please move the opening bracket of the function into the next line. See the
> kernel coding style documentation.

Will do.
> 
> Thanks,
> 
> 	tglx


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