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[209.132.180.67]) by mx.google.com with ESMTP id b190si12819065pga.635.2017.11.12.17.18.52; Sun, 12 Nov 2017 17:19:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@codeaurora.org header.s=default header.b=fQn8xo8c; dkim=pass header.i=@codeaurora.org header.s=default header.b=fQn8xo8c; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751526AbdKMBQ7 (ORCPT + 87 others); Sun, 12 Nov 2017 20:16:59 -0500 Received: from smtp.codeaurora.org ([198.145.29.96]:56922 "EHLO smtp.codeaurora.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751061AbdKMBQ5 (ORCPT ); Sun, 12 Nov 2017 20:16:57 -0500 Received: by smtp.codeaurora.org (Postfix, from userid 1000) id F0FE06081A; Mon, 13 Nov 2017 01:16:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1510535816; bh=Q8VigwLeWszrkVvgstpvY0WzmnkygR0kbBp4jAd4464=; h=From:To:Cc:Subject:Date:From; b=fQn8xo8clDj5mjF8k7kza43D+LvXDGVaXkGt/Yrm4R0mi+mEHorRwQA9Gjvirkf5L klZrf7An7qIdry5EgmgV+oGe0nbyvAgs3a0Wfl0fbbrNid3wYAzF/r7lAD1RGQ+Ad2 ScdW6636eNmJTACtOoZySBd/rE5iOJC6PP0wD/TU= X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on pdx-caf-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-2.8 required=2.0 tests=ALL_TRUSTED,BAYES_00, DKIM_SIGNED,T_DKIM_INVALID autolearn=no autolearn_force=no version=3.4.0 Received: from shankerd-ubuntu.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: shankerd@smtp.codeaurora.org) by smtp.codeaurora.org (Postfix) with ESMTPSA id 6A3B46055A; Mon, 13 Nov 2017 01:16:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=codeaurora.org; s=default; t=1510535816; bh=Q8VigwLeWszrkVvgstpvY0WzmnkygR0kbBp4jAd4464=; h=From:To:Cc:Subject:Date:From; b=fQn8xo8clDj5mjF8k7kza43D+LvXDGVaXkGt/Yrm4R0mi+mEHorRwQA9Gjvirkf5L klZrf7An7qIdry5EgmgV+oGe0nbyvAgs3a0Wfl0fbbrNid3wYAzF/r7lAD1RGQ+Ad2 ScdW6636eNmJTACtOoZySBd/rE5iOJC6PP0wD/TU= DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 6A3B46055A Authentication-Results: pdx-caf-mail.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: pdx-caf-mail.web.codeaurora.org; spf=none smtp.mailfrom=shankerd@codeaurora.org From: Shanker Donthineni To: Will Deacon , Marc Zyngier , linux-arm-kernel@lists.infradead.org Cc: Catalin Marinas , Ard Biesheuvel , Matt Fleming , Christoffer Dall , linux-kernel@vger.kernel.org, linux-efi@vger.kernel.org, kvmarm@lists.cs.columbia.edu, Shanker Donthineni Subject: [PATCH v2 0/2] Implement a software workaround for Falkor erratum 1041 Date: Sun, 12 Nov 2017 19:16:40 -0600 Message-Id: <1510535802-2799-1-git-send-email-shankerd@codeaurora.org> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Falkor CPU, we’ve discovered a hardware issue which might lead to a kernel crash or the unexpected behavior. The Falkor core may errantly access memory locations on speculative instruction fetches. This may happen whenever MMU translation state, SCTLR_ELn[M] bit is being changed from enabled to disabled for the currently running exception level. To prevent the errant hardware behavior, software must execute an ISB immediately prior to executing the MSR that changes SCTLR_ELn[M] from a value of 1 to 0. To simplify the complexity of a workaround, this patch series issues an ISB whenever SCTLR_ELn[M] is changed to 0 to fix the Falkor erratum 1041. Patch2 from V1 series got dropped to accommodate review comments. Apply the workaround where it's required. Patch1: - CPUTYPE definitions for Falkor CPU. Patch2: - Actual workaround changes for erratum E1041. Shanker Donthineni (2): arm64: Define cputype macros for Falkor CPU arm64: Add software workaround for Falkor erratum 1041 Documentation/arm64/silicon-errata.txt | 1 + arch/arm64/Kconfig | 10 ++++++++++ arch/arm64/include/asm/assembler.h | 18 ++++++++++++++++++ arch/arm64/include/asm/cpucaps.h | 3 ++- arch/arm64/include/asm/cputype.h | 2 ++ arch/arm64/kernel/cpu-reset.S | 1 + arch/arm64/kernel/cpu_errata.c | 16 ++++++++++++++++ arch/arm64/kernel/efi-entry.S | 2 ++ arch/arm64/kernel/head.S | 1 + arch/arm64/kernel/relocate_kernel.S | 1 + arch/arm64/kvm/hyp-init.S | 1 + 11 files changed, 55 insertions(+), 1 deletion(-) -- Qualcomm Datacenter Technologies, Inc. on behalf of the Qualcomm Technologies, Inc. Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project. From 1583715730545775989@xxx Fri Nov 10 21:23:36 +0000 2017 X-GM-THRID: 1583710384566234849 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread