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Thu, 9 Nov 2017 21:07:44 -0700 From: Bao Xiaowei To: , , , , , , , , , , , , , , , , , , , , , , , CC: Bao Xiaowei Subject: [PATCHv4 3/3] ARMv8: pcie: make the DWC EP driver support for layerscape Date: Fri, 10 Nov 2017 11:48:47 +0800 Message-ID: <20171110034847.17891-4-xiaowei.bao@nxp.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171110034847.17891-1-xiaowei.bao@nxp.com> References: <20171110034847.17891-1-xiaowei.bao@nxp.com> X-EOPAttributedMessage: 0 X-Matching-Connectors: 131547604721171583;(91ab9b29-cfa4-454e-5278-08d120cd25b8);() X-Forefront-Antispam-Report: CIP:192.88.168.50;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(6009001)(336005)(7966004)(39380400002)(346002)(376002)(39860400002)(2980300002)(1110001)(1109001)(339900001)(189002)(199003)(97736004)(47776003)(4326008)(68736007)(48376002)(5003940100001)(8936002)(39060400002)(106466001)(53936002)(8656006)(105606002)(33646002)(104016004)(77096006)(50226002)(85426001)(1076002)(2906002)(81166006)(81156014)(189998001)(36756003)(110136005)(7416002)(2201001)(8676002)(50466002)(316002)(356003)(5660300001)(305945005)(6636002)(86362001)(16586007)(2950100002)(498600001)(50986999)(76176999)(921003)(1121003)(83996005)(2101003);DIR:OUT;SFP:1101;SCL:1;SRVR:DM5PR03MB2700;H:tx30smr01.am.freescale.net;FPR:;SPF:Fail;PTR:InfoDomainNonexistent;MX:1;A:1;LANG:en; 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Signed-off-by: Bao Xiaowei Acked-by: Minghuan Lian --- v2: no change v3: no change v4: no change drivers/pci/dwc/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig index 22ec82fcdea2..b5f507795779 100644 --- a/drivers/pci/dwc/Kconfig +++ b/drivers/pci/dwc/Kconfig @@ -108,6 +108,7 @@ config PCI_LAYERSCAPE depends on PCI_MSI_IRQ_DOMAIN select MFD_SYSCON select PCIE_DW_HOST + select PCIE_DW_EP help Say Y here if you want PCIe controller support on Layerscape SoCs. -- 2.14.1 From 1583646880728416595@xxx Fri Nov 10 03:09:16 +0000 2017 X-GM-THRID: 1583646880728416595 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread