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[209.132.180.67]) by mx.google.com with ESMTP id a9si22165789pgd.769.2017.11.27.02.17.07; Mon, 27 Nov 2017 02:17:19 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751785AbdK0KHP (ORCPT + 78 others); Mon, 27 Nov 2017 05:07:15 -0500 Received: from sci-ig2.spreadtrum.com ([222.66.158.135]:42316 "EHLO SHSQR01.spreadtrum.com" rhost-flags-OK-FAIL-OK-OK) by vger.kernel.org with ESMTP id S1751381AbdK0KHN (ORCPT ); Mon, 27 Nov 2017 05:07:13 -0500 Received: from ig2.spreadtrum.com (shmbx03.spreadtrum.com [10.0.1.208]) by SHSQR01.spreadtrum.com with ESMTP id vARA6aCm032530 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Mon, 27 Nov 2017 18:06:36 +0800 (CST) (envelope-from Chunyan.Zhang@spreadtrum.com) Received: from SHCAS02.spreadtrum.com (10.0.1.202) by SHMBX03.spreadtrum.com (10.0.1.208) with Microsoft SMTP Server (TLS) id 15.0.847.32; Mon, 27 Nov 2017 18:07:03 +0800 Received: from localhost (10.0.73.143) by SHCAS02.spreadtrum.com (10.0.1.250) with Microsoft SMTP Server (TLS) id 15.0.847.32 via Frontend Transport; Mon, 27 Nov 2017 18:07:03 +0800 From: Chunyan Zhang To: Stephen Boyd , Michael Turquette , Rob Herring , Mark Rutland CC: Catalin Marinas , Will Deacon , , , , , Arnd Bergmann , Mark Brown , Xiaolong Zhang , Ben Li , Orson Zhai , Chunyan Zhang Subject: [PATCH V6 00/12] add clock driver for Spreadtrum platforms Date: Mon, 27 Nov 2017 18:01:03 +0800 Message-ID: <20171127100115.20655-1-chunyan.zhang@spreadtrum.com> X-Mailer: git-send-email 2.12.2 MIME-Version: 1.0 Content-Type: text/plain X-MAIL: SHSQR01.spreadtrum.com vARA6aCm032530 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: Chunyan Zhang This series adds Spreadtrum clock support together with its binding documentation and devicetree data. This patchset also added a few common clock mactos into drivers/clk/clk_common.h, which are generally useful for all vendors' clock driver, sunxi-ng, zte, sprd (added in this patchse) use them (or part of them) at present, once this patchset is merged, I can help to remove the duplicated code which is under the vendors' respective directories. Thanks, Chunyan Changes from V5: (https://lkml.org/lkml/2017/11/20/21) * Rebased the whole patch-set to 4.15-rc1; * Fixed kbuild-test warnings; * Switched to use devm_clk_hw_register() instead of clk_hw_register(); * Removed useless debug information from sc9860-clk.c. Changes from V4: (https://lkml.org/lkml/2017/11/10/30) * Added acked-by of Rob Herring; * Removed spin lock from Spreadtrum's gate, mux, div drivers, since we have switched to use regmap. Changes from V3: (https://lkml.org/lkml/2017/11/2/61) * Addressed comments from Julien Thierry: - Clean the if branch of sprd_mux_helper_get_parent() - Have the Gate clock macros and ops for both mode (i.e. sc_gate and gate) separate; - Have the Mux clock macros with/without table separate, and same changes for the composite clock. * Switched the function name from _endisable to _toggle; * Fixed Kbuild test error: - Added exporting sprd_clk_regmap_init() which would be used in other module(s); * Change the function sprd_clk_set_regmap() to the static one, and removed the declear from the include file; * Addressed comments from Rob: - Separate the dt-binding include file from the driver patch; - Documented more for the property "clocks" * Changed the syscon device names; * Changed the name of 'sprd_mux_internal' to 'sprd_mux_ssel' Changes from V2: (http://lkml.iu.edu/hypermail/linux/kernel/1707.1/01504.html) * Switch to use regmap to access registers; * Splited all clocks into 16 separated nodes, for each belongs to a single address area; * Rearranged the order of clock declaration in sc9860-clk.c, sorted them upon the address area; * Added syscon device tree nodes which will be quoted by the node of clocks which are in the same address area with the syscon device; * Revised the binding documentation according to the dt modification. Changes from V1: (https://lkml.org/lkml/2017/6/17/356) * Address Stephen's comments: - Switch to use platform device driver instead of the DT probing mechanism. - Move the common clock macro out from vendor directory, but need to remove those overlap code from other vendors (such as sunxi-ng) once this get merged. - Add support to be built as a module. - Add 'sprd_' prefix for all spin locks used in these drivers. - Mark input parameter of sprd_x with const. - Remove unreasonable dependencies to CONFIG_64BIT. - Add readl() after writing the same register. - Remove CLK_IS_BASIC which is no longer used. - Remove unnecessery CLK_IGNORE_UNUSED when defining a clock. - Change to expose all clock index. - Use clk_ instead of ccu. - Add Kconfig for sprd clocks. - Move the fixed clocks out from the soc node. - Switch to use 64-bit math in pll driver instead of 32-bit math. * Revise binding documentation according to dt modification. * Rename sc9860.c to sc9860-clk.c Chunyan Zhang (12): drivers: move clock common macros out from vendor directories clk: sprd: Add common infrastructure clk: sprd: add gate clock support clk: sprd: add mux clock support clk: sprd: add divider clock support clk: sprd: add composite clock support clk: sprd: add adjustable pll support dt-bindings: Add Spreadtrum clock binding documentation clk: sprd: Add dt-bindings include file for SC9860 clk: sprd: add clocks support for SC9860 arm64: dts: add syscon for whale2 platform arm64: dts: add clocks for SC9860 Documentation/devicetree/bindings/clock/sprd.txt | 63 + arch/arm64/boot/dts/sprd/sc9860.dtsi | 115 ++ arch/arm64/boot/dts/sprd/whale2.dtsi | 48 +- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/clk_common.h | 60 + drivers/clk/sprd/Kconfig | 14 + drivers/clk/sprd/Makefile | 11 + drivers/clk/sprd/common.c | 99 ++ drivers/clk/sprd/common.h | 52 + drivers/clk/sprd/composite.c | 62 + drivers/clk/sprd/composite.h | 53 + drivers/clk/sprd/div.c | 92 + drivers/clk/sprd/div.h | 77 + drivers/clk/sprd/gate.c | 113 ++ drivers/clk/sprd/gate.h | 61 + drivers/clk/sprd/mux.c | 78 + drivers/clk/sprd/mux.h | 76 + drivers/clk/sprd/pll.c | 268 +++ drivers/clk/sprd/pll.h | 110 ++ drivers/clk/sprd/sc9860-clk.c | 1981 ++++++++++++++++++++++ include/dt-bindings/clock/sprd,sc9860-clk.h | 408 +++++ 22 files changed, 3841 insertions(+), 2 deletions(-) create mode 100644 Documentation/devicetree/bindings/clock/sprd.txt create mode 100644 drivers/clk/clk_common.h create mode 100644 drivers/clk/sprd/Kconfig create mode 100644 drivers/clk/sprd/Makefile create mode 100644 drivers/clk/sprd/common.c create mode 100644 drivers/clk/sprd/common.h create mode 100644 drivers/clk/sprd/composite.c create mode 100644 drivers/clk/sprd/composite.h create mode 100644 drivers/clk/sprd/div.c create mode 100644 drivers/clk/sprd/div.h create mode 100644 drivers/clk/sprd/gate.c create mode 100644 drivers/clk/sprd/gate.h create mode 100644 drivers/clk/sprd/mux.c create mode 100644 drivers/clk/sprd/mux.h create mode 100644 drivers/clk/sprd/pll.c create mode 100644 drivers/clk/sprd/pll.h create mode 100644 drivers/clk/sprd/sc9860-clk.c create mode 100644 include/dt-bindings/clock/sprd,sc9860-clk.h -- 2.7.4 From 1583776749618167606@xxx Sat Nov 11 13:33:29 +0000 2017 X-GM-THRID: 1583392243183170079 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread