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Date:   Thu, 09 Nov 2017 13:36:30 -0800 (PST)
Subject:     Re: [patches] [PATCH 0/2] riscv: pass endianness and machine size to sparse
In-Reply-To: <20171109055354.14716-1-luc.vanoostenryck@gmail.com>
CC:     luc.vanoostenryck@gmail.com, albert@sifive.com,
        patches@groups.riscv.org, linux-kernel@vger.kernel.org
From:   Palmer Dabbelt <palmer@sifive.com>
To:     luc.vanoostenryck@gmail.com
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On Wed, 08 Nov 2017 21:53:52 PST (-0800), luc.vanoostenryck@gmail.com wrote:
> The goal of these two patches is to ass endianness and machine
> size info to sparse so that sparse can emit correct diagnostics
> even when the endianness and machine size doesn't correspond to
> sparse's defaults.
>
> Luc Van Oostenryck (2):
>   riscv: pass endianness info to sparse
>   riscv: pass machine size to sparse
>
>  arch/riscv/Makefile | 4 ++++
>  1 file changed, 4 insertions(+)

Thanks!  I'll take these into the RISC-V tree.

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