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[209.132.180.67]) by mx.google.com with ESMTP id 1si8298303plx.766.2017.11.05.03.02.48; Sun, 05 Nov 2017 03:03:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@kapsi.fi header.s=20161220 header.b=UoSkC1+O; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=nvidia.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752514AbdKELCG (ORCPT + 96 others); Sun, 5 Nov 2017 06:02:06 -0500 Received: from mail.kapsi.fi ([91.232.154.25]:45523 "EHLO mail.kapsi.fi" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750751AbdKELCD (ORCPT ); Sun, 5 Nov 2017 06:02:03 -0500 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=kapsi.fi; s=20161220; h=Message-Id:Date:Subject:Cc:To:From; bh=RyjxnagSmpAWICBFefEer9/gnMpp+k/KQOvAGqLmpSw=; b=UoSkC1+O2dj+kzcmliemgJrChiVnsb+BhK65vshdjlMufmtee05I88m3e/HuwV+fwluDwN/AvfWyl6mQRpHzIz/3GsXrAs/GXghAgrQq/iRS36t1KvjaczJUD5a5ieE9rMRMTaxsKEwzTniWSuwmnP9add89eVHu+Kr9i0unlU4V/X964BTqT9gw62PdKQEnRrhW6NPHjEsTDbXAKBskpWtCNw+tidfpYfF9Zq0XAk57eHp6XJ+3U8KU/lYWQg/2sDud938TNgOzLoRg2/FHCo1uxq1o7LAxH0bMMgEL3WeDC1b5pbmq0QPgYcrLV2CTyjpJxhN02b93iuFib3ZB1w==; Received: from dsl-hkibng22-54f983-249.dhcp.inet.fi ([84.249.131.249] helo=localhost.localdomain) by mail.kapsi.fi with esmtpsa (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.84_2) (envelope-from ) id 1eBIgj-0006dR-VZ; Sun, 05 Nov 2017 13:02:02 +0200 From: Mikko Perttunen To: thierry.reding@gmail.com, jonathanh@nvidia.com Cc: digetx@gmail.com, dri-devel@lists.freedesktop.org, linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org, Mikko Perttunen Subject: [PATCH 00/10] Dynamic Host1x channel allocation Date: Sun, 5 Nov 2017 13:01:08 +0200 Message-Id: <20171105110118.15142-1-mperttunen@nvidia.com> X-Mailer: git-send-email 2.14.2 X-SA-Exim-Connect-IP: 84.249.131.249 X-SA-Exim-Mail-From: mperttunen@nvidia.com X-SA-Exim-Scanned: No (on mail.kapsi.fi); SAEximRunCond expanded to false Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi all, this adds support for a new model of hardware channel allocation for Host1x/TegraDRM. In the current model, one hardware channel is allocated for each client device at probe time. This is simple but does not allow for optimal use of hardware resources. In the new model, we allocate channels dynamically when a "userspace channel", opened using the channel open IOCTL, has pending jobs. However, each userspace channel can only have one assigned channel at a time, ensuring current serialization behavior is kept. As such there is no change in programming model for the userspace. The patch adapts VIC to use the new model - GR2D and GR3D are not modified, as the older Tegra chips they are found on do not have a large number of hardware channels and therefore it is not clear if the new model is beneficial (and I don't have access to those chips to test it out). Tested using the host1x_test test suite, and also by running the performance test of host1x_test in parallel. Thanks, Mikko Mikko Perttunen (10): gpu: host1x: Parameterize channel aperture size gpu: host1x: Print MLOCK state in debug dumps on T186 gpu: host1x: Add lock around channel allocation gpu: host1x: Lock classes during job submission gpu: host1x: Add job done callback drm/tegra: Deliver job completion callback to client drm/tegra: Make syncpoints be per-context drm/tegra: Implement dynamic channel allocation model drm/tegra: Boot VIC in runtime resume gpu: host1x: Optionally block when acquiring channel drivers/gpu/drm/tegra/drm.c | 82 +++++++++++++++-- drivers/gpu/drm/tegra/drm.h | 12 ++- drivers/gpu/drm/tegra/gr2d.c | 8 +- drivers/gpu/drm/tegra/gr3d.c | 8 +- drivers/gpu/drm/tegra/vic.c | 120 ++++++++++++------------ drivers/gpu/host1x/cdma.c | 45 ++++++--- drivers/gpu/host1x/cdma.h | 1 + drivers/gpu/host1x/channel.c | 47 ++++++++-- drivers/gpu/host1x/channel.h | 3 + drivers/gpu/host1x/hw/cdma_hw.c | 122 +++++++++++++++++++++++++ drivers/gpu/host1x/hw/channel_hw.c | 74 +++++++++++---- drivers/gpu/host1x/hw/debug_hw_1x06.c | 18 +++- drivers/gpu/host1x/hw/host1x01_hardware.h | 10 ++ drivers/gpu/host1x/hw/host1x02_hardware.h | 10 ++ drivers/gpu/host1x/hw/host1x04_hardware.h | 10 ++ drivers/gpu/host1x/hw/host1x05_hardware.h | 10 ++ drivers/gpu/host1x/hw/host1x06_hardware.h | 10 ++ drivers/gpu/host1x/hw/hw_host1x01_channel.h | 2 + drivers/gpu/host1x/hw/hw_host1x01_sync.h | 6 ++ drivers/gpu/host1x/hw/hw_host1x02_channel.h | 2 + drivers/gpu/host1x/hw/hw_host1x02_sync.h | 6 ++ drivers/gpu/host1x/hw/hw_host1x04_channel.h | 2 + drivers/gpu/host1x/hw/hw_host1x04_sync.h | 6 ++ drivers/gpu/host1x/hw/hw_host1x05_channel.h | 2 + drivers/gpu/host1x/hw/hw_host1x05_sync.h | 6 ++ drivers/gpu/host1x/hw/hw_host1x06_hypervisor.h | 5 + drivers/gpu/host1x/hw/hw_host1x06_vm.h | 2 + include/linux/host1x.h | 6 +- 28 files changed, 517 insertions(+), 118 deletions(-) -- 2.14.2 From 1583491662371641186@xxx Wed Nov 08 10:02:08 +0000 2017 X-GM-THRID: 1583491662371641186 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread