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[209.132.180.67]) by mx.google.com with ESMTP id v17si3418676pgb.810.2017.10.26.08.01.27; Thu, 26 Oct 2017 08:01:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=r9iNebBD; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932400AbdJZPAy (ORCPT + 99 others); Thu, 26 Oct 2017 11:00:54 -0400 Received: from mail-yw0-f194.google.com ([209.85.161.194]:50912 "EHLO mail-yw0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932246AbdJZPAw (ORCPT ); Thu, 26 Oct 2017 11:00:52 -0400 Received: by mail-yw0-f194.google.com with SMTP id i198so3151916ywe.7; Thu, 26 Oct 2017 08:00:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=3DBI1g2GDyQTg/VQMyBpIEKKmvKZcifKMGdsJ9cH8rM=; b=r9iNebBDK1vmpnZQb8XJnKXixTNu55owTnjUNhD9lnKTv8Mrwjewneth6ScmqXQQAz vv6lVbZN8jwGXAA/D/2AFZ0H66GbLfyK6HKtgoI8giNf9mNj/9n2ovSMRpfjwdZdZnuo yv3TZeuZUy0B66XMbEw2+Je92/0MP8mM1PtY9i6q8dJRC5rxJ6DqYiXAUETd8viAVKq6 76So2cHT4blnncw6/Ugz80IjZemI9USS4FiTJvlO/gGs3tH17Hz/HC7aaXppUrxPF4n4 HhqMB9quyvz+VD0EJs6OAGwLXQ7lfAujFLtRVd5I7BEcRkqbcSPKpEfQckNZzn+QWbKk UyZQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=3DBI1g2GDyQTg/VQMyBpIEKKmvKZcifKMGdsJ9cH8rM=; b=f13MiNU/Ew+1rSgVDSX5yMDy9A0IjaTrHWSgo+R1pTPCgMQCz38iewQNsknXDFzAjB QGexFRs0TtjeRzbIcVRYENDj0WaWdJlH4MWU7LfpDzq87kDM2aCL2+s7rjU1PFu3T6kj f3s5J3olQ6coiygbg//cRcioOvlxf53Z71Y89ZChDGt839qemrGZhDmNfQ28L2U9+oIb gkiCLsszk0iyrNxDbJM7Ky1ktslaD0xer98DCsxsE9uMhvexHKgYTOyc5x5o7u/Kd+iB O82euGySm6dcvfodQowI0sVCiKWtMyE3/I/TL9xhvPbGxly/zWLxuvjZXUVCr39NgIwR U4IA== X-Gm-Message-State: AMCzsaUGn+4s1wNCqtJRkIwAj19VGD2A38XAvS0eg5A5B8evKcMp4KKd VCV+twBq0oRoJF13Wn/TlSfbadKoVDdfQxO4ZTw= X-Received: by 10.13.229.66 with SMTP id o63mr15771123ywe.440.1509030051173; Thu, 26 Oct 2017 08:00:51 -0700 (PDT) MIME-Version: 1.0 Received: by 10.129.107.7 with HTTP; Thu, 26 Oct 2017 08:00:50 -0700 (PDT) In-Reply-To: <72749501-974d-e11c-1fa4-fda00e594264@redhat.com> References: <20171026071327.15427-1-pbonzini@redhat.com> <72749501-974d-e11c-1fa4-fda00e594264@redhat.com> From: Nick Sarnie Date: Thu, 26 Oct 2017 11:00:50 -0400 Message-ID: Subject: Re: [PATCH] KVM: SVM: obey guest PAT To: David Hildenbrand Cc: Paolo Bonzini , linux-kernel@vger.kernel.org, kvm@vger.kernel.org, stable@vger.kernel.org Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 26, 2017 at 4:17 AM, David Hildenbrand wrote: > On 26.10.2017 09:13, Paolo Bonzini wrote: >> For many years some users of assigned devices have reported worse >> performance on AMD processors with NPT than on AMD without NPT, >> Intel or bare metal. >> >> The reason turned out to be that SVM is discarding the guest PAT >> setting and uses the default (PA0=PA4=WB, PA1=PA5=WT, PA2=PA6=UC-, >> PA3=UC). The guest might be using a different setting, and >> especially might want write combining but isn't getting it >> (instead getting slow UC or UC- accesses). >> >> Thanks a lot to geoff@hostfission.com for noticing the relation >> to the g_pat setting. The patch has been tested also by a bunch >> of people on VFIO users forums. >> >> Fixes: 709ddebf81cb40e3c36c6109a7892e8b93a09464 >> Fixes: https://bugzilla.kernel.org/show_bug.cgi?id=196409 >> Cc: stable@vger.kernel.org >> Signed-off-by: Paolo Bonzini >> --- >> arch/x86/kvm/svm.c | 7 +++++++ >> 1 file changed, 7 insertions(+) >> >> diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c >> index af256b786a70..af09baa3d736 100644 >> --- a/arch/x86/kvm/svm.c >> +++ b/arch/x86/kvm/svm.c >> @@ -3626,6 +3626,13 @@ static int svm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr) >> u32 ecx = msr->index; >> u64 data = msr->data; >> switch (ecx) { >> + case MSR_IA32_CR_PAT: >> + if (!kvm_mtrr_valid(vcpu, MSR_IA32_CR_PAT, data)) >> + return 1; >> + vcpu->arch.pat = data; >> + svm->vmcb->save.g_pat = data; >> + mark_dirty(svm->vmcb, VMCB_NPT); >> + break; >> case MSR_IA32_TSC: >> kvm_write_tsc(vcpu, msr); >> break; >> > > Although no SVM expert, looking at the way it is handled on VMX, this > looks good to me. > > Reviewed-by: David Hildenbrand > > -- > > Thanks, > > David Tested-by: Nick Sarnie You're a legend. Thanks, Sarnex From 1582307385683249519@xxx Thu Oct 26 08:18:34 +0000 2017 X-GM-THRID: 1582303334601229964 X-Gmail-Labels: Inbox,Category Forums