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[209.132.180.67]) by mx.google.com with ESMTP id h3si770632pgr.92.2017.10.20.07.00.36; Fri, 20 Oct 2017 07:00:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gateworks-com.20150623.gappssmtp.com header.s=20150623 header.b=wMPAaeuW; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751816AbdJTOAM (ORCPT + 99 others); Fri, 20 Oct 2017 10:00:12 -0400 Received: from mail-wr0-f182.google.com ([209.85.128.182]:57278 "EHLO mail-wr0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751661AbdJTOAK (ORCPT ); Fri, 20 Oct 2017 10:00:10 -0400 Received: by mail-wr0-f182.google.com with SMTP id r79so11445724wrb.13 for ; Fri, 20 Oct 2017 07:00:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gateworks-com.20150623.gappssmtp.com; s=20150623; h=mime-version:in-reply-to:references:from:date:message-id:subject:to :cc; bh=KhUAX4rm789RWmPCDcbmik/ZoWXAoroP8yMKh5bW/ho=; b=wMPAaeuWuNnEU235+zJNZS/rpboFlL7KyxL/yeFPIu4qA8aeCgYTl1XWo3pgjyEm+w PhnaNySDb2SsYsqHTosDbUZ9wNeFuqROOOWMI2SRJ80vuH3b3MpyKdCQ9wqFxCZRkzDq O3BAAGZd3lE4USMhXfv6881liUlS4qtQmqYFPv5AO8ioOMrvV8sP92dlk4zIdaUSjix+ K84kb6JLcLWCJ2Hyh43JbgG6bB2RyiLNCGt+ryqzfYg/3yfDyNPYDjPH7nUeBsiKrcwZ 9jLfzO7EAmtYMgeVpYF5op0UBr3ULwBKYUxXL0l8utsauYtEIFMuxKUpgTDSs3yoOuJo pM0A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc; bh=KhUAX4rm789RWmPCDcbmik/ZoWXAoroP8yMKh5bW/ho=; b=Cpayn6iZeVQY2wIyzpVBWJHy/o/Zl4C0U0WZ2CwWafm72qpzQcUidoS3Yoidbup2BS KkwipYDvSGstBGuNHp9y9h43z2YieFy6RkMDSA0orQ+Yrxc6I+x7/m01Mh6edH8LSgSQ HPBAg8EPFnFW42lz42VkvTQzwr1JA1ze7GJyaC+Ekj+V7GHRRQTUVjLWlwzQOBVJLykE c/gFMKOkVpiHnAPP3CZWSUz1IsIRkjiBZ7+JdqB/9cA5Hc9iVZZqyY8cnDSAKaW+q/s/ AiVxQ63Vymv5LXxxz/MDBVLFgAh63EdCoHS5YiOFXG6bdDZ+8rfc9BdFw5BAVOfMRPwH 5s/w== X-Gm-Message-State: AMCzsaXiYd0cYXgH5Gl8YT4040DZmrotDTzP+AeKTLBhHQ2j5etCSMEy B3wrtwsHUjhdRDp5JJ4/FVznqyOzKTcPk3YgquVMaA== X-Google-Smtp-Source: ABhQp+R8sgYczT76kt0eOlZ5rIDF1T6eQhGm4qowbBczcBHny0RVZTKxQve5VXvRA/Riyum3HzO2d8Jc98cv5KvfVtA= X-Received: by 10.223.144.71 with SMTP id h65mr4856686wrh.41.1508508008324; Fri, 20 Oct 2017 07:00:08 -0700 (PDT) MIME-Version: 1.0 Received: by 10.28.228.215 with HTTP; Fri, 20 Oct 2017 07:00:07 -0700 (PDT) In-Reply-To: References: <1507783506-3884-1-git-send-email-tharvey@gateworks.com> <1507783506-3884-4-git-send-email-tharvey@gateworks.com> <230ceb18-1d69-7fa8-acb0-c810094f8e50@xs4all.nl> From: Tim Harvey Date: Fri, 20 Oct 2017 07:00:07 -0700 Message-ID: Subject: Re: [PATCH v2 3/4] media: i2c: Add TDA1997x HDMI receiver driver To: Hans Verkuil Cc: linux-media , alsa-devel@alsa-project.org, "devicetree@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Shawn Guo , Steve Longerbeam , Philipp Zabel , Hans Verkuil , Mauro Carvalho Chehab Content-Type: text/plain; charset="UTF-8" Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Thu, Oct 19, 2017 at 12:39 AM, Hans Verkuil wrote: >>> What I am missing here is handling of the RGB quantization range. >>> An HDMI receiver will typically send full range RGB or limited range YUV >>> to the SoC. The HDMI source can however send full or limited range RGB >>> or limited range YUV (full range YUV is theoretically possible, but nobody >>> does that). >>> >> >> isn't this quantization range a function of the colorspace and >> colorimetry dictated by the AVI infoframe? I'm taking these into >> consideration when setting up the conversion matrix in >> tda1997x_configure_conv(). > > No, it's independent of that. and from another reply: > A small correction here: while ideally you should indeed check if the current > EDID supports selectable RGB Quantization Range, in practice you don't need > to. If the source explicitly sets the RGB quantization range, then just use > that. > > Note: some hardware can do this automatically (adv7604) by detecting what is > transmitted in the AVI InfoFrame. That's probably not the case here since you > have to provide a conversion matrix. I see the AVI infoframe has hdmi_quantization_range and hdmi_ycc_quantization_range along with vid_code. I'm not at all clear what to do with this information. Is there anything you see in the datasheet [1] that points to something I need to be doing? > >> >>> For a Full HD receiver the rules when receiving RGB video are as follows: >>> >>> If the EDID supports selectable RGB Quantization Range, then check if the >>> source explicitly sets the RGB quantization range in the AVI InfoFrame and >>> use that value. >>> >>> Otherwise fall back to the default rules: >>> >>> if VIC == 0, then expect full range RGB, otherwise expect limited range RGB. >> >> Are you referring to the video_code field of the AVI infoframe or vic >> from a vendor infoframe? > > AVI InfoFrame. > > The HDMI VIC codes in the vendor InfoFrame are only valid for 4k formats. And > that's not supported by this device, right? Right, the TDA1997x supports 1080p only. > >> >>> >>> It gets even more complicated with 4k video, but this is full HD only. >>> >>> In addition, you may also want to implement the V4L2_CID_DV_RX_RGB_RANGE control >>> to let userspace override the autodetection. >> >> I'll add that as an additional patch. Are there other V4L2_CID's that >> I should be adding here? > > V4L2_CID_DV_RX_POWER_PRESENT (if possible) and optionally V4L2_CID_DV_RX_IT_CONTENT_TYPE. > It looks like there is a register for 5V_HPD detect. I assume the content type to return is the value reported from the AVI frame? >> >> Regarding video standard detection where this chip provides me with >> vertical-period, horizontal-period, and horizontal-pulse-width I >> should be able to detect the standard simply based off of >> vertical-period (framerate) and horizontal-period (line width >> including blanking) right? I wasn't sure if my method of matching >> these within 14% tolerance made sense. I will be removing the hsmatch >> logic from that as it seems the horizontal-pulse-width should be >> irrelevant. > > For proper video detection you ideally need: > > h/v sync size > h/v back/front porch size > h/v polarity > pixelclock (usually an approximation) > > The v4l2_find_dv_timings_cap() helper can help you find the corresponding > timings, allowing for pixelclock variation. > > That function assumes that the sync/back/frontporch values are all known. > But not all devices can actually discover those values. What can your > hardware detect? Can it tell front and backporch apart? Can it determine > the sync size? > > I've been considering for some time to improve that helper function to be > able to handle hardware that isn't able separate sync/back/frontporch values. > The TDA1997x provides only the vertical/horizontal periods and the horizontal pulse width (section 8.3.4 of datasheet [1]). Can you point me to a good primer on the relationship between these values and the h/v back/front porch? Currently I iterate over the list of known formats calculating hper (bt->pixelclock / V4L2_DV_BT_FRAME_WIDTH(bt)) and vper (hper / V4L2_DV_BT_FRAME_HEIGHT(bt)) (framerate) and find the closest match within +/- 7% tolerance. The list of supported formats is sorted by framerate then width. /* look for matching timings */ for (i = 0; i < ARRAY_SIZE(tda1997x_hdmi_modes); i++) { const struct tda1997x_video_std *std = &tda1997x_hdmi_modes[i]; const struct v4l2_bt_timings *bt = &std->timings.bt; int _hper, _vper, _hsper; int vmin, vmax, hmin, hmax, hsmin, hsmax; int vmatch, hsmatch; width = V4L2_DV_BT_FRAME_WIDTH(bt); lines = V4L2_DV_BT_FRAME_HEIGHT(bt); _hper = (int)bt->pixelclock / (int)width; _vper = _hper / lines; _hsper = (int)bt->pixelclock / (int)bt->hsync; if (bt->interlaced) _vper *= 2; /* vper +/- 0.7% */ vmin = 993 * (27000000 / _vper) / 1000; vmax = 1007 * (27000000 / _vper) / 1000; _hsper = (int)bt->pixelclock / (int)bt->hsync; if (bt->interlaced) _vper *= 2; /* vper +/- 0.7% */ vmin = 993 * (27000000 / _vper) / 1000; vmax = 1007 * (27000000 / _vper) / 1000; /* hper +/- 0.7% */ hmin = 993 * (27000000 / _hper) / 1000; hmax = 1007 * (27000000 / _hper) / 1000; /* vmatch matches the framerate */ vmatch = ((vper <= vmax) && (vper >= vmin)) ? 1 : 0; /* hmatch matches the width */ hmatch = ((hper <= hmax) && (hper >= hmin)) ? 1 : 0; if (vmatch && hsmatch) { v4l_info(state->client, "resolution: %dx%d%c@%d (%d/%d/%d) %dMHz %d\n", bt->width, bt->height, bt->interlaced?'i':'p', _vper, vper, hper, hsper, pixrate, hsmatch); state->fps = (int)bt->pixelclock / (width * lines); state->std = std; return 0; } } Note that I've thrown out any comparisons based on horizontal pulse width from my first patch as that didn't appear to fit well. So far the above works well however I do fail to recognize the following modes (using a Marshall SG4K HDMI test generator): VESA640x480P_60HZ v4l2 defines this as 4L2_DV_BT_CEA_640X480P59_94 which fails vmatch VESA1400x1050P_60HZ should match V4L2_DV_BT_DMT_1400X1050P60_RB but it calculates 59Hz and fails vmatch VESA1920x1200P_60HZ should match V4L2_DV_BT_DMT_1920X1200P60_RB but it calculates 59Hz and fails vmatch CEAVIC1440x480I_60HZ not in v4l2-dv-timings.h CEAVIC720x480P_60HZ not in v4l2-dv-timings.h (there's a 720x480p59) CEAVIC1440x576I_50HZ not in v4l2-dv-timings.h I should have mentioned in my cover letter that I only have a datasheet for this device and some fairly obfuscated vendor example code - I don't have proper register set documentation. Regards, Tim [1] http://dev.gateworks.com/datasheets/TDA19971-datasheet-rev3.pdf From 1581671637338613537@xxx Thu Oct 19 07:53:37 +0000 2017 X-GM-THRID: 1581025700141870942 X-Gmail-Labels: Inbox,Category Forums