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[209.132.180.67]) by mx.google.com with ESMTP id u6si915005pld.151.2017.11.07.02.56.16; Tue, 07 Nov 2017 02:56:28 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@gmail.com header.s=20161025 header.b=NVLvqgkv; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=gmail.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755788AbdKGHol (ORCPT + 91 others); Tue, 7 Nov 2017 02:44:41 -0500 Received: from mail-pg0-f67.google.com ([74.125.83.67]:48049 "EHLO mail-pg0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755746AbdKGHoh (ORCPT ); Tue, 7 Nov 2017 02:44:37 -0500 Received: by mail-pg0-f67.google.com with SMTP id o7so1546175pgc.4; Mon, 06 Nov 2017 23:44:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9S6RulsHUpXe2UTShe6QkSBndRckSbvkmk36JvN/vQ4=; b=NVLvqgkvaY7cL+11Vu1pPP0jhhDqVQbCfMME2majRnQte9lj0BlvOW/MH09JH8wSaX bOILGfm/VNCl1HdS9QtFTZ13T0/PfCQGtwbLAcCd/AL7otmryaHdxD2jwD7qh8fmYBFb 84eEHoXgVem3bUhI4lWac0STKFCGSTobK8iGlnyWnUv/UVv7wMr3QRslJJoYmdS0Bvje SPbXzG2qLZ32CWLGmpQ67385cP6R7UiFFY3v4xSh4tJ41Ph83pi4qroPRYZYTZWhEdj0 +WPAXUK2K301txrpYIXtMyI0a9zEnNrF9piVMFTFu8mMtpotdtYpHgKVSVnsDR5zDgBK crKA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9S6RulsHUpXe2UTShe6QkSBndRckSbvkmk36JvN/vQ4=; b=suDpo0IGwpaMd0ZwivwVZrRmdnLIai7o7p6ZKHK9q2QIafr1ej7iHc0cDR/MyoCnrF MvUx0pjD/5CFW0BnxPMCPdciuIW9t7AbW8oeRsZfV28EuNLTZYkO70vIjKF0ynYTh0bN gPBtdMi7UgrrNs6VA8XZcR/fuYe0WkCh+yQHVO6feJ2WuK22xMr9CK+4/mSblmnXPyBd 4J98lA35VugwcU/qTa89+0HjDZOvZrHdr5VgTwprz5NG23vMFKyxhv9pmfuYzkfLAC2W Pajokn4jYLJ7AxKVWBzQDKiZcBtjnqb7Xec5iMgvMN92reiKjmPy1311sT+ApS95lbGw 7N/Q== X-Gm-Message-State: AMCzsaXz5VLZGlwnRbaTHQnoNt7jAHQ651D5RLTQVVNA4yTC6i8ZuT6A yrntS62y6SiripIkPefvwjE= X-Received: by 10.99.116.19 with SMTP id p19mr18386954pgc.47.1510040677150; Mon, 06 Nov 2017 23:44:37 -0800 (PST) Received: from app09.andestech.com ([118.163.51.199]) by smtp.gmail.com with ESMTPSA id y10sm1473256pfl.186.2017.11.06.23.44.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 06 Nov 2017 23:44:36 -0800 (PST) From: Rick Chen To: daniel.lezcano@linaro.org, tglx@linutronix.de, robh@kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, rick@andestech.com Cc: Rick Chen , Greentime Hu Subject: [PATCH v3 3/3] dt-bindings: timer: Add andestech atcpit100 timer binding doc Date: Tue, 7 Nov 2017 15:19:53 +0800 Message-Id: <1510039193-32522-4-git-send-email-rickchen36@gmail.com> X-Mailer: git-send-email 1.7.9.5 In-Reply-To: <1510039193-32522-1-git-send-email-rickchen36@gmail.com> References: <1510039193-32522-1-git-send-email-rickchen36@gmail.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add a document to describe Andestech atcpit100 timer and binding information. Signed-off-by: Rick Chen Acked-by: Rob Herring Signed-off-by: Greentime Hu --- .../bindings/timer/andestech,atcpit100-timer.txt | 31 ++++++++++++++++++++++ 1 file changed, 31 insertions(+) create mode 100644 Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt diff --git a/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt new file mode 100644 index 0000000..a87278a --- /dev/null +++ b/Documentation/devicetree/bindings/timer/andestech,atcpit100-timer.txt @@ -0,0 +1,31 @@ +Andestech ATCPIT100 timer +------------------------------------------------------------------ +ATCPIT100 is a generic IP block from Andes Technology, embedded in +Andestech AE3XX platforms and other designs. + +This timer is a set of compact multi-function timers, which can be +used as pulse width modulators (PWM) as well as simple timers. + +It supports up to 4 PIT channels. Each PIT channel is a +multi-function timer and provide the following usage scenarios: +One 32-bit timer +Two 16-bit timers +Four 8-bit timers +One 16-bit PWM +One 16-bit timer and one 8-bit PWM +Two 8-bit timer and one 8-bit PWM + +Required properties: +- compatible : Should be "andestech,atcpit100" +- reg : Address and length of the register set +- interrupts : Reference to the timer interrupt +- clock-frequency : The rate in HZ in input of the Andestech ATCPIT100 timer + +Examples: + +timer0: timer@f0400000 { + compatible = "andestech,atcpit100"; + reg = <0xf0400000 0x1000>; + interrupts = <2 4>; + clock-frequency = <30000000>; +}; -- 2.7.4 From 1583411684591796042@xxx Tue Nov 07 12:50:55 +0000 2017 X-GM-THRID: 1583411684591796042 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread