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[209.132.180.67]) by mx.google.com with ESMTP id o5si25262114plh.477.2017.11.27.23.32.17; Mon, 27 Nov 2017 23:32:29 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752272AbdK1HbF (ORCPT + 78 others); Tue, 28 Nov 2017 02:31:05 -0500 Received: from mailgw01.mediatek.com ([210.61.82.183]:18635 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1751796AbdK1H3I (ORCPT ); Tue, 28 Nov 2017 02:29:08 -0500 X-UUID: dcad6eeaf9c141edbae8e06c35d55ace-20171128 Received: from mtkcas08.mediatek.inc [(172.21.101.126)] by mailgw01.mediatek.com (envelope-from ) (mhqrelay.mediatek.com ESMTP with TLS) with ESMTP id 890860058; Tue, 28 Nov 2017 15:29:03 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs03n2.mediatek.inc (172.21.101.182) with Microsoft SMTP Server (TLS) id 15.0.1210.3; Tue, 28 Nov 2017 15:29:01 +0800 Received: from mtkslt210.mediatek.inc (10.21.14.14) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1210.3 via Frontend Transport; Tue, 28 Nov 2017 15:29:01 +0800 From: Weiyi Lu To: Matthias Brugger , Stephen Boyd , Mike Turquette , Rob Herring CC: James Liao , Fan Chen , , , , , , , Weiyi Lu Subject: [PATCH v7 0/6] Mediatek MT2712 clock and scpsys support Date: Tue, 28 Nov 2017 15:28:16 +0800 Message-ID: <1511854102-23195-2-git-send-email-weiyi.lu@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1511854102-23195-1-git-send-email-weiyi.lu@mediatek.com> References: <1511854102-23195-1-git-send-email-weiyi.lu@mediatek.com> MIME-Version: 1.0 Content-Type: text/plain X-MTK: N Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This series is based on v4.15-rc1 and composed of scpsys control (PATCH 1-4) and device tree (PATCH 5-6) changes since v6: - Rebase to v4.15-rc1. changes since v5: - Refine bus protection with proper variable name and better implementation for the if statement. changes since v4: - Refine scpsys and infracfg for bus protection by passing a boolean flag to determine the register update method changes since v3: - Rebase to v4.14-rc1. changes since v2: - ensure the clocks used by clocksource driver are registered before clocksource init() by using CLK_OF_DECLARE() - correct the frequency of clk32k/clkrtc_ext/clkrtc_int changes since v1: - Rebase to v4.13-next-soc. - Refine scpsys and infracfg for bus protection. *** BLURB HERE *** Weiyi Lu (6): dt-bindings: soc: add MT2712 power dt-bindings soc: mediatek: extend bus protection API soc: mediatek: add dependent clock jpgdec/audio for scpsys soc: mediatek: add MT2712 scpsys support arm: dts: mt2712: Add clock controller device nodes arm: dts: Add power controller device node of MT2712 .../devicetree/bindings/soc/mediatek/scpsys.txt | 3 + arch/arm64/boot/dts/mediatek/mt2712e.dtsi | 131 +++++++++++++++++++ drivers/soc/mediatek/mtk-infracfg.c | 26 +++- drivers/soc/mediatek/mtk-scpsys.c | 140 ++++++++++++++++++--- include/dt-bindings/power/mt2712-power.h | 26 ++++ include/linux/soc/mediatek/infracfg.h | 7 +- 6 files changed, 311 insertions(+), 22 deletions(-) create mode 100644 include/dt-bindings/power/mt2712-power.h -- 1.9.1 From 1585294088393642342@xxx Tue Nov 28 07:30:56 +0000 2017 X-GM-THRID: 1585294088393642342 X-Gmail-Labels: Inbox,Category Forums,HistoricalUnread