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From:   "Liang, Kan" <kan.liang@intel.com>
To:     Thomas Gleixner <tglx@linutronix.de>
CC:     "peterz@infradead.org" <peterz@infradead.org>,
        "mingo@redhat.com" <mingo@redhat.com>,
        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
        "acme@kernel.org" <acme@kernel.org>,
        "eranian@google.com" <eranian@google.com>,
        "ak@linux.intel.com" <ak@linux.intel.com>
Subject: RE: [PATCH V3 1/5] perf/x86/intel/uncore: customized pmu event read
 for client IMC uncore
Thread-Topic: [PATCH V3 1/5] perf/x86/intel/uncore: customized pmu event
 read for client IMC uncore
Thread-Index: AQHTTPn8N2Thg1PlBU23gMJh7UBtUqMAoguAgACGaBD//3vBgIAAAViAgACGcoD//3zEgIAAAYeAgACG4uA=
Date:   Thu, 2 Nov 2017 14:27:22 +0000
Message-ID: <37D7C6CF3E00A74B8858931C1DB2F077537DCA69@SHSMSX103.ccr.corp.intel.com>
References: <1508843124-4081-1-git-send-email-kan.liang@intel.com>
 <alpine.DEB.2.20.1711021446030.2090@nanos>
 <37D7C6CF3E00A74B8858931C1DB2F077537DCA04@SHSMSX103.ccr.corp.intel.com>
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> On Thu, 2 Nov 2017, Thomas Gleixner wrote:
> > On Thu, 2 Nov 2017, Liang, Kan wrote:
> > > > On Thu, 2 Nov 2017, Thomas Gleixner wrote:
> > > > > On Thu, 2 Nov 2017, Liang, Kan wrote:
> > > > > > Patch 5/5 will clean up the client IMC uncore.
> > > > > > Before that, we still need it to make client IMC uncore work.
> > > > > >
> > > > > > This patch isolates the >= case for client IMC uncore.
> > > > >
> > > > > Fair enough. A comment to that effect (even when removed later)
> > > > > would have avoided that question.
> > > >
> > > > Thinking more about it. The current code only supports the fixed one,
> right?
> > > > So why would it deal with anything > FIXED?
> > > >
> > >
> > > There are two free running counters in IMC.
> > > To support the second one, the previous code implicitly do
> > > UNCORE_PMC_IDX_FIXED + 1.
> > > So it has to deal with > FIXED case.
> > >
> > > 	case SNB_UNCORE_PCI_IMC_DATA_READS:
> > > 		base = SNB_UNCORE_PCI_IMC_DATA_READS_BASE;
> > > 		idx = UNCORE_PMC_IDX_FIXED;
> > > 		break;
> > > 	case SNB_UNCORE_PCI_IMC_DATA_WRITES:
> > > 		base = SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE;
> > > 		idx = UNCORE_PMC_IDX_FIXED + 1;
> > > 		break;
> > > 	default:
> > > 		return -EINVAL;
> >
> > Fugly that is, but as its cleaned up later....
> 
> But then you have this in uncore_perf_event_update():
> 
> -       if (event->hw.idx >= UNCORE_PMC_IDX_FIXED)
> +       if (event->hw.idx == UNCORE_PMC_IDX_FIXED)
> 
> So how is that supposed to work?

This is for generic code. 

In previous code, the event_read function for IMC use generic code.
So we have to deal with >= in generic code.

Now, customized event_read function 'snb_uncore_imc_event_read'
 is introduced for IMC. So IMC does not touch the generic code. 
The generic code is corrected here.

Thanks,
Kan
> 
> I think your patch order is wrong and breaks bisectability all over the place as
> you fixup the UNCORE_PMC_IDX_FIXED + 1 hackery in 5/5.
> 
> Thanks,
> 
> 	tglx

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