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[209.132.180.67]) by mx.google.com with ESMTP id f26si971881pff.119.2017.11.01.06.00.03; Wed, 01 Nov 2017 06:00:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754662AbdKAM70 (ORCPT + 99 others); Wed, 1 Nov 2017 08:59:26 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:9988 "EHLO szxga05-in.huawei.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751525AbdKAM7Y (ORCPT ); Wed, 1 Nov 2017 08:59:24 -0400 Received: from 172.30.72.59 (EHLO DGGEMS403-HUB.china.huawei.com) ([172.30.72.59]) by dggrg05-dlp.huawei.com (MOS 4.4.6-GA FastPath queued) with ESMTP id DKF88668; Wed, 01 Nov 2017 20:54:51 +0800 (CST) Received: from [127.0.0.1] (10.142.68.147) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.361.1; Wed, 1 Nov 2017 20:54:45 +0800 Subject: Re: [PATCH v1 1/3] arm64: add a macro for SError synchronization To: Robin Murphy , , , , , , , , , , , , , References: <1509563697-6359-1-git-send-email-gengdongjiu@huawei.com> <1509563697-6359-2-git-send-email-gengdongjiu@huawei.com> <6dc82768-8564-a54e-041b-3b9965fa038b@arm.com> From: gengdongjiu Message-ID: Date: Wed, 1 Nov 2017 20:54:44 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:52.0) Gecko/20100101 Thunderbird/52.3.0 MIME-Version: 1.0 In-Reply-To: <6dc82768-8564-a54e-041b-3b9965fa038b@arm.com> Content-Type: text/plain; charset="utf-8" Content-Language: en-US Content-Transfer-Encoding: 7bit X-Originating-IP: [10.142.68.147] X-CFilter-Loop: Reflected X-Mirapoint-Virus-RAPID-Raw: score=unknown(0), refid=str=0001.0A020201.59F9C41C.017F,ss=1,re=0.000,recu=0.000,reip=0.000,cl=1,cld=1,fgs=0, ip=0.0.0.0, so=2014-11-16 11:51:01, dmn=2013-03-21 17:37:32 X-Mirapoint-Loop-Id: 6d441d9196957fb2dcff3707d6f6b026 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Hi Robin, On 2017/11/1 19:24, Robin Murphy wrote: >> + esb >> +alternative_else_nop_endif >> +1: >> + .endm > Having a branch in here is pretty horrible, and furthermore using label > number 1 has a pretty high chance of subtly breaking code where this > macro is inserted. > > Can we not somehow nest or combine the alternative conditions here? I found it will report error if combine the alternative conditions here. For example: + .macro error_synchronize +alternative_if ARM64_HAS_IESB +alternative_if ARM64_HAS_RAS_EXTN + esb +alternative_else_nop_endif +alternative_else_nop_endif + .endm And even using b.eq/cbz instruction in the alternative instruction in arch/arm64/kernel/entry.S, it will report Error. For example below alternative_if ARM64_HAS_PAN xxxxxxxxxxxxxxxxxxxx b.eq xxxxx alternative_else_nop_endif I do not dig it deeply, do you know the reason about it or good suggestion about that? Thanks a lot in advance. > > Robin. > >> #endif /* __ASM_ASSEMBLER_H */ From 1582862752833507035@xxx Wed Nov 01 11:25:53 +0000 2017 X-GM-THRID: 1582861919438601873 X-Gmail-Labels: Inbox,Category Forums