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CC:     Xiaowei Bao <xiaowei.bao@nxp.com>
Subject: RE: [PATCH 3/3] ARMv8: pcie: make the DWC EP driver support for
 layerscape
Thread-Topic: [PATCH 3/3] ARMv8: pcie: make the DWC EP driver support for
 layerscape
Thread-Index: AQHTTKT+FzIYC9f6T02+eepUfir4w6MA4Pmw
Date:   Thu, 2 Nov 2017 09:31:33 +0000
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References: <20171024083045.31135-1-xiaowei.bao@nxp.com>
 <20171024083045.31135-4-xiaowei.bao@nxp.com>
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Acked-by: Minghuan Lian <minghuan.Lian@nxp.com>

> -----Original Message-----
> From: Bao Xiaowei [mailto:xiaowei.bao@nxp.com]
> Sent: Tuesday, October 24, 2017 4:31 PM
> To: robh+dt@kernel.org; mark.rutland@arm.com; catalin.marinas@arm.com;
> will.deacon@arm.com; bhelgaas@google.com; shawnguo@kernel.org;
> Madalin-cristian Bucur <madalin.bucur@nxp.com>; Sumit Garg
> <sumit.garg@nxp.com>; Y.b. Lu <yangbo.lu@nxp.com>; hongtao.jia@nxp.com;
> Andy Tang <andy.tang@nxp.com>; Leo Li <leoyang.li@nxp.com>;
> kishon@ti.com; jingoohan1@gmail.com; pbrobinson@gmail.com;
> songxiaowei@hisilicon.com; devicetree@vger.kernel.org; linux-arm-
> kernel@lists.infradead.org; linux-kernel@vger.kernel.org; linux-
> pci@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Z.q. Hou
> <zhiqiang.hou@nxp.com>; Mingkai Hu <mingkai.hu@nxp.com>; M.h. Lian
> <minghuan.lian@nxp.com>
> Cc: Xiaowei Bao <xiaowei.bao@nxp.com>
> Subject: [PATCH 3/3] ARMv8: pcie: make the DWC EP driver support for
> layerscape
>=20
> Layerscape pcie controllers support RC or EP mode, Add the EP mode suppor=
t in
> Kconfig, the driver will support both RC and EP mode, and the driver is a=
ble to
> judge the pcie controllers work on RC or EP mode.
>=20
> Signed-off-by: Bao Xiaowei <xiaowei.bao@nxp.com>
> ---
>  drivers/pci/dwc/Kconfig | 1 +
>  1 file changed, 1 insertion(+)
>=20
> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig index
> 22ec82fcdea2..b5f507795779 100644
> --- a/drivers/pci/dwc/Kconfig
> +++ b/drivers/pci/dwc/Kconfig
> @@ -108,6 +108,7 @@ config PCI_LAYERSCAPE
>  	depends on PCI_MSI_IRQ_DOMAIN
>  	select MFD_SYSCON
>  	select PCIE_DW_HOST
> +	select PCIE_DW_EP
>  	help
>  	  Say Y here if you want PCIe controller support on Layerscape SoCs.
>=20
> --
> 2.14.1


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