Date: Thu, 17 Jan 2008 12:02:27 +0000
From: Alan Cox <alan@lxorguk.ukuu.org.uk>
To: David Newall <davidn@davidnewall.com>
Cc: "David P. Reed" <dpreed@reed.com>, David Woodhouse <dwmw2@infradead.org>,
       Rene Herman <rene.herman@keyaccess.nl>,
       Zachary Amsden <zach@vmware.com>, "H. Peter Anvin" <hpa@zytor.com>,
       Christer Weinigel <christer@weinigel.se>,
       Ondrej Zary <linux@rainbow-software.org>, Bodo Eggert <7eggert@gmx.de>,
       Ingo Molnar <mingo@elte.hu>, Paul Rolland <rol@as2917.net>,
       Pavel Machek <pavel@ucw.cz>, Thomas Gleixner <tglx@linutronix.de>,
       linux-kernel@vger.kernel.org, Ingo Molnar <mingo@redhat.com>,
       rol <rol@witbe.net>
Subject: Re: [linux-kernel] Re: [PATCH] x86: provide a DMI based port 0x80
 I/O delay override.
Message-ID: <20080117120227.3d09baf5@lxorguk.ukuu.org.uk>
In-Reply-To: <478EF4C9.8030406@davidnewall.com>
References: <9BdU5-1YW-9@gated-at.bofh.it>
	<200801081810.58904.linux@rainbow-software.org>
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	<20080108185120.3ff7ed18@lxorguk.ukuu.org.uk>
	<4783CBD9.7020709@reed.com>
	<1199847162.7369.323.camel@bodhitayantram.eng.vmware.com>
	<47845972.9090803@zytor.com>
	<1199915614.7369.367.camel@bodhitayantram.eng.vmware.com>
	<47854916.4080703@reed.com>
	<1200015388.6192.22.camel@bodhitayantram.eng.vmware.com>
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	<1200347847.2647.97.camel@shinybook.infradead.org>
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	<20080116145515.6d84dc7b@lxorguk.ukuu.org.uk>
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	<20080116200829.26040351@lxorguk.ukuu.org.uk>
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> This is a timing issue, isn't it?  How are we synchronising, other than
> by delaying for a (bus-dependant) period?  The characteristics of each
> bus are known so a number can be assigned for "one bus cycle", without
> having to use the bus.

The characteristics of the bus are not known. It could be anything
between 6 and about 16MHz. The way you read the bus clock is system
dependant.

The underlying problem is really that over time some of the hardware has
moved from the ISA world into the chipsets. That is why I sent Ingo the
patches for inb_pit/inb_pic and to split ISA 8390 and non ISA 8390
support. Someone has to tackle the CMOS but we are then in a position to
relegant port 0x80 timing use to ISA systems where it is fine.

Alan
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