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Mon, 25 Mar 2024 04:42:34 +0000 (UTC) Content-Type: text/plain; charset="utf-8" Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: Re: [PATCH v3 0/4] riscv: sophgo: add reset support for SG2042 From: patchwork-bot+linux-riscv@kernel.org Message-Id: <171134175454.18749.13038964057011467100.git-patchwork-notify@kernel.org> Date: Mon, 25 Mar 2024 04:42:34 +0000 References: In-Reply-To: To: Chen Wang Cc: linux-riscv@lists.infradead.org, aou@eecs.berkeley.edu, chao.wei@sophgo.com, conor@kernel.org, krzysztof.kozlowski+dt@linaro.org, palmer@dabbelt.com, paul.walmsley@sifive.com, p.zabel@pengutronix.de, robh+dt@kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, haijiao.liu@sophgo.com, xiaoguang.xing@sophgo.com, guoren@kernel.org, jszhang@kernel.org, inochiama@outlook.com, unicorn_wang@outlook.com Hello: This series was applied to riscv/linux.git (fixes) by Inochi Amaoto : On Tue, 30 Jan 2024 09:49:08 +0800 you wrote: > From: Chen Wang > > This series adds reset controller support for Sophgo SG2042 using > reset-simple driver. > > Thanks, > Chen > > [...] Here is the summary with links: - [v3,1/4] dt-bindings: reset: sophgo: support SG2042 (no matching commit) - [v3,2/4] reset: simple: add support for Sophgo SG2042 (no matching commit) - [v3,3/4] riscv: dts: add reset generator for Sophgo SG2042 SoC https://git.kernel.org/riscv/c/1ce7587e507e - [v3,4/4] riscv: dts: add resets property for uart node https://git.kernel.org/riscv/c/08573ba006ab You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html