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From: Varadarajan Narayanan <quic_varada@quicinc.com>
To: <andersson@kernel.org>, <konrad.dybcio@linaro.org>,
        <mturquette@baylibre.com>, <sboyd@kernel.org>, <robh@kernel.org>,
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CC: Varadarajan Narayanan <quic_varada@quicinc.com>
Subject: [PATCH v2 1/4] dt-bindings: clock: Add interconnect-cells
Date: Mon, 25 Mar 2024 15:50:33 +0530
Message-ID: <20240325102036.95484-2-quic_varada@quicinc.com>
In-Reply-To: <20240325102036.95484-1-quic_varada@quicinc.com>
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Add interconnect-cells to clock provider so that it can be
used as icc provider

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
 Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml
index 944a0ea79cd6..824781cbdf34 100644
--- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml
+++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml
@@ -33,6 +33,9 @@ properties:
       - description: PCIE30 PHY3 pipe clock source
       - description: USB3 PHY pipe clock source
 
+  '#interconnect-cells':
+    const: 1
+
 required:
   - compatible
   - clocks
-- 
2.34.1