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Message-ID: <ba78805af8b39237b22a0ff87c4ba3c614a43910.camel@xry111.site>
Subject: Re: [PATCHv3 pci-next 1/2] PCI/AER: correctable error message as
 KERN_INFO
From: Xi Ruoyao <xry111@xry111.site>
To: Ethan Zhao <haifeng.zhao@linux.intel.com>, Bjorn Helgaas
	 <helgaas@kernel.org>
Cc: Grant Grundler <grundler@chromium.org>, bhelgaas@google.com, 
	linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, 
	linuxppc-dev@lists.ozlabs.org, mahesh@linux.ibm.com, oohall@gmail.com, 
	rajat.khandelwal@linux.intel.com, rajatja@chromium.org
Date: Mon, 25 Mar 2024 18:15:50 +0800
In-Reply-To: <38601aef-b082-463f-8e41-f73a4307de21@linux.intel.com>
References: <20230918193913.GA203601@bhelgaas>
	 <0a44fd663e93ac5b36865b0080da52d94252791a.camel@xry111.site>
	 <38601aef-b082-463f-8e41-f73a4307de21@linux.intel.com>
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On Mon, 2024-03-25 at 16:45 +0800, Ethan Zhao wrote:
> On 3/25/2024 1:19 AM, Xi Ruoyao wrote:
> > On Mon, 2023-09-18 at 14:39 -0500, Bjorn Helgaas wrote:
> > > On Mon, Sep 18, 2023 at 07:42:30PM +0800, Xi Ruoyao wrote:
> > > > ...
> > > > My workstation suffers from too much correctable AER reporting as w=
ell
> > > > (related to Intel's errata "RPL013: Incorrectly Formed PCIe Packets=
 May
> > > > Generate Correctable Errors" and/or the motherboard design, I guess=
).
> > > We should rate-limit correctable error reporting so it's not
> > > overwhelming.
> > >=20
> > > At the same time, I'm *also* interested in the cause of these errors,
> > > in case there's a Linux defect or a hardware erratum that we can work
> > > around.=C2=A0 Do you have a bug report with any more details, e.g., a=
 dmesg
> > > log and "sudo lspci -vv" output?
> > Hi Bjorn,
> >=20
> > Sorry for the *very* late reply (somehow I didn't see the reply at all
> > before it was removed by my cron job, and now I just savaged it from
> > lore.kernel.org...)
> >=20
> > The dmesg is like:
> >=20
> > [=C2=A0 882.456994] pcieport 0000:00:1c.1: AER: Multiple Correctable er=
ror message received from 0000:00:1c.1
> > [=C2=A0 882.457002] pcieport 0000:00:1c.1: AER: found no error details =
for 0000:00:1c.1
> > [=C2=A0 882.457003] pcieport 0000:00:1c.1: AER: Multiple Correctable er=
ror message received from 0000:06:00.0
> > [=C2=A0 883.545763] pcieport 0000:00:1c.1: AER: Multiple Correctable er=
ror message received from 0000:00:1c.1
> > [=C2=A0 883.545789] pcieport 0000:00:1c.1: PCIe Bus Error: severity=3DC=
orrectable, type=3DPhysical Layer, (Receiver ID)
> > [=C2=A0 883.545790] pcieport 0000:00:1c.1:=C2=A0=C2=A0 device [8086:7a3=
9] error status/mask=3D00000001/00002000
> > [=C2=A0 883.545792] pcieport 0000:00:1c.1:=C2=A0=C2=A0=C2=A0 [ 0] RxErr=
=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0 (First)
> > [=C2=A0 883.545794] pcieport 0000:00:1c.1: AER:=C2=A0=C2=A0 Error of th=
is Agent is reported first
> > [=C2=A0 883.545798] r8169 0000:06:00.0: PCIe Bus Error: severity=3DCorr=
ectable, type=3DPhysical Layer, (Transmitter ID)
> > [=C2=A0 883.545799] r8169 0000:06:00.0:=C2=A0=C2=A0 device [10ec:8125] =
error status/mask=3D00001101/0000e000
> > [=C2=A0 883.545800] r8169 0000:06:00.0:=C2=A0=C2=A0=C2=A0 [ 0] RxErr=C2=
=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=
=C2=A0=C2=A0=C2=A0=C2=A0 (First)
> > [=C2=A0 883.545801] r8169 0000:06:00.0:=C2=A0=C2=A0=C2=A0 [ 8] Rollover
> > [=C2=A0 883.545802] r8169 0000:06:00.0:=C2=A0=C2=A0=C2=A0 [12] Timeout
> > [=C2=A0 883.545815] pcieport 0000:00:1c.1: AER: Correctable error messa=
ge received from 0000:00:1c.1
> > [=C2=A0 883.545823] pcieport 0000:00:1c.1: AER: found no error details =
for 0000:00:1c.1
> > [=C2=A0 883.545824] pcieport 0000:00:1c.1: AER: Multiple Correctable er=
ror message received from 0000:06:00.0
> >=20
> > lspci output attached.
> >=20
> > Intel has issued an errata "RPL013" saying:
> >=20
> > "Under complex microarchitectural conditions, the PCIe controller may
> > transmit an incorrectly formed Transaction Layer Packet (TLP), which
> > will fail CRC checks.=C2=A0When this erratum occurs, the PCIe end point=
 may
> > record correctable errors resulting in either a NAK or link recovery.
> > Intel=C2=AE has not observed any functional impact due to this erratum.=
"
> >=20
> > But I'm really unsure if it describes my issue.
> >=20
> > Do you think I have some broken hardware and I should replace the CPU
> > and/or the motherboard (where the r8169 is soldered)?=C2=A0 I've notice=
d that
> > my 13900K is almost impossible to overclock (despite it's a K), but I'v=
e
> > not encountered any issue other than these AER reporting so far after I
> > gave up overclocking.
>=20
> Seems there are two r8169 nics on your board, only 0000:06:00.0 reports
> aer errors, how about another one the 0000:07:00.0 nic ?

It never happens to 0000:07:00.0, even if I plug the ethernet cable into
it instead of 0000:06:00.0.

Maybe I should just use 0000:07:00.0 and blacklist 0000:06:00.0 as I
don't need two NICs?

--=20
Xi Ruoyao <xry111@xry111.site>
School of Aerospace Science and Technology, Xidian University