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Mon, 25 Mar 2024 15:50:04 GMT Received: from hu-kathirav-blr.qualcomm.com (10.80.80.8) by nalasex01a.na.qualcomm.com (10.47.209.196) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Mon, 25 Mar 2024 08:49:59 -0700 From: Kathiravan Thirumoorthy Subject: [PATCH v2 0/3] Add support for the IPQ5321 SoC Date: Mon, 25 Mar 2024 21:19:47 +0530 Message-ID: <20240325-ipq5321-sku-support-v2-0-f30ce244732f@quicinc.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit X-B4-Tracking: v=1; b=H4sIABudAWYC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyjHQUlJIzE vPSU3UzU4B8JSMDIxMDIyML3cyCQlNjI0Pd4uxS3eLSgoL8ohLdpBQDcwNTsxTTVANDJaDOgqL UtMwKsKnRsbW1AFhtsH1lAAAA To: Bjorn Andersson , Konrad Dybcio , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Ilia Lin , "Rafael J. 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Add the SoC ID and the cpufreq support. Maximum cpufreq for IPQ5321 is 1.1GHZ, which is determined based on the eFuse. Viresh is okay to merge the cpufreq change via qcom tree[1] and provided his Ack. [1] https://lore.kernel.org/linux-arm-msm/20240306053200.6iwrviltwt3pnfnt@vireshk-i7/ Signed-off-by: Kathiravan Thirumoorthy --- Changes in v2: - rebase on next-20240325 - pick up the tags - Link to v1: https://lore.kernel.org/linux-arm-msm/20240228-ipq5321-sku-support-v1-0-14e4d4715f4b@quicinc.com/ --- Kathiravan Thirumoorthy (3): dt-bindings: arm: qcom,ids: Add SoC ID for IPQ5321 soc: qcom: socinfo: Add SoC ID for IPQ5321 cpufreq: qcom-nvmem: add support for IPQ5321 drivers/cpufreq/qcom-cpufreq-nvmem.c | 1 + drivers/soc/qcom/socinfo.c | 1 + include/dt-bindings/arm/qcom,ids.h | 1 + 3 files changed, 3 insertions(+) --- base-commit: 1fdad13606e104ff103ca19d2d660830cb36d43e change-id: 20240228-ipq5321-sku-support-bd07056d5e01 Best regards, -- Kathiravan Thirumoorthy