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From: =?UTF-8?Q?Pawe=C5=82_Dembicki?= <paweldembicki@gmail.com>
Date: Mon, 25 Mar 2024 21:42:07 +0100
Message-ID: <CAJN1Kkw0ufQC0k9LdQCkdVN0+7SD+MM9aZxNxdFnKunC8+MvWA@mail.gmail.com>
Subject: Re: [PATCH net-next v6 07/16] net: dsa: vsc73xx: Add vlan filtering
To: Vladimir Oltean <olteanv@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>, netdev@vger.kernel.org, 
	Linus Walleij <linus.walleij@linaro.org>, Simon Horman <horms@kernel.org>, 
	Andrew Lunn <andrew@lunn.ch>, "David S. Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, 
	Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, 
	Claudiu Manoil <claudiu.manoil@nxp.com>, Alexandre Belloni <alexandre.belloni@bootlin.com>, 
	UNGLinuxDriver@microchip.com, Russell King <linux@armlinux.org.uk>, 
	linux-kernel@vger.kernel.org
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pt., 8 mar 2024 o 14:09 Vladimir Oltean <olteanv@gmail.com> napisa=C5=82(a)=
:
>
> On Tue, Mar 05, 2024 at 03:51:11PM -0800, Florian Fainelli wrote:
> > On 3/1/24 14:16, Pawel Dembicki wrote:
> > > This patch implements VLAN filtering for the vsc73xx driver.
> > >
> > > After starting VLAN filtering, the switch is reconfigured from QinQ t=
o
> > > a simple VLAN aware mode. This is required because VSC73XX chips do n=
ot
> > > support inner VLAN tag filtering.
> > >
> > > Signed-off-by: Pawel Dembicki <paweldembicki@gmail.com>
> > > ---
> >
> > [snip]
> >
> > [snip]
> >
> > Have to admit the logic is a bit hard to follow, but that is also becau=
se of
> > my lack of understanding of the requirements surrounding the use of
> > tag_8021q.
>
> It's not only that. The code is also a bit hard on the brain for me.
>
> An alternative coding pattern would be to observe that certain hardware
> registers (the egress-untagged VLAN, the PVID) depend on a constellation
> of N input variables (the bridge VLAN filtering state, the tag_8021q
> active state, the bridge VLAN table). So, to make the code easier to
> follow and to ensure correctness, in theory a central function could be
> written, which embeds the same invariant logic of determining what to
> program the registers with, depending on the N inputs. This invariant
> function is called from every place that modifies any of the N inputs.
>
> What Pawe=C5=82 did here was to have slightly different code paths for
> modifying the hardware registers, each code path adjusted slightly on
> the state change transition of individual inputs.
>
> This was a design choice on which I commented very early on, stating
> that it's unusual but that I can go along with it. It is probably very
> ingrained with the choice of the untagged_storage[] and pvid_storage[]
> arrays, the logic of swapping the storage with the hardware at VLAN
> filtering state change, and thus very hard to change at this stage of
> development.

I have to admit that it wasn't an optimal implementation. I focused on
the wrong priorities, which led me astray. I prepared v7 and I tried
to maximize simplicity. I hope it will be more acceptable than the v6
version.