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bh=FfLHiy8Np0Ojm/mylOsW6CnKsAh2WH7Zx2l6XpB1aDI=; b=zG8S5VJYwkr3im2ltwzDyDoMRNY19sCdjcoWZf2EpjNloCCwYqQdk9jPzOGbBUGQ4z8JlI 3COrmfQpElP9XzBA== From: "tip-bot2 for Ingo Molnar" Sender: tip-bot2@linutronix.de Reply-to: linux-kernel@vger.kernel.org To: linux-tip-commits@vger.kernel.org Subject: [tip: x86/urgent] Documentation/x86: Fix title underline length Cc: Stephen Rothwell , Ingo Molnar , Tony Luck , x86@kernel.org, linux-kernel@vger.kernel.org In-Reply-To: <20240325121750.265d655c@canb.auug.org.au> References: <20240325121750.265d655c@canb.auug.org.au> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Message-ID: <171136310847.10875.2241882307085232437.tip-bot2@tip-bot2> Robot-ID: Robot-Unsubscribe: Contact to get blacklisted from these emails Precedence: bulk Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit The following commit has been merged into the x86/urgent branch of tip: Commit-ID: 91491e5fb09624116950f9f2e1767a42e1da7868 Gitweb: https://git.kernel.org/tip/91491e5fb09624116950f9f2e1767a42e1da7868 Author: Ingo Molnar AuthorDate: Mon, 25 Mar 2024 11:29:16 +01:00 Committer: Ingo Molnar CommitterDate: Mon, 25 Mar 2024 11:29:16 +01:00 Documentation/x86: Fix title underline length Fix: Documentation/arch/x86/resctrl.rst:577: WARNING: Title underline too short. Reported-by: Stephen Rothwell Signed-off-by: Ingo Molnar Cc: Tony Luck Link: https://lore.kernel.org/r/20240325121750.265d655c@canb.auug.org.au --- Documentation/arch/x86/resctrl.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/arch/x86/resctrl.rst b/Documentation/arch/x86/resctrl.rst index 3712d81..6c24558 100644 --- a/Documentation/arch/x86/resctrl.rst +++ b/Documentation/arch/x86/resctrl.rst @@ -574,7 +574,7 @@ Memory b/w domain is L3 cache. MB:=bandwidth0;=bandwidth1;... Memory bandwidth Allocation specified in MiBps ---------------------------------------------- +---------------------------------------------- Memory bandwidth domain is L3 cache. ::