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Date: Mon, 25 Mar 2024 14:38:32 -0700
From: Davidlohr Bueso <dave@stgolabs.net>
To: Ira Weiny <ira.weiny@intel.com>
Cc: Dave Jiang <dave.jiang@intel.com>, Fan Ni <fan.ni@samsung.com>, 
	Jonathan Cameron <Jonathan.Cameron@huawei.com>, Navneet Singh <navneet.singh@intel.com>, 
	Dan Williams <dan.j.williams@intel.com>, Alison Schofield <alison.schofield@intel.com>, 
	Vishal Verma <vishal.l.verma@intel.com>, linux-btrfs@vger.kernel.org, linux-cxl@vger.kernel.org, 
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 05/26] cxl/core: Simplify cxl_dpa_set_mode()
Message-ID: <zmcr2lththfsr2zvmgksmmbaupfss2lmgjkyegpvqokynnaknq@ssp2xxvyl222>
References: <20240324-dcd-type2-upstream-v1-0-b7b00d623625@intel.com>
 <20240324-dcd-type2-upstream-v1-5-b7b00d623625@intel.com>
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On Sun, 24 Mar 2024, Ira Weiny wrote:

>cxl_dpa_set_mode() checks the mode for validity two times, once outside
>of the DPA RW semaphore and again within.  The function is not in a
>critical path.  Prior to Dynamic Capacity the extra check was not much
>of an issue.  The addition of DC modes increases the complexity of
>the check.

I agree (also to pick this up regardless of dcd work).

>
>Simplify the mode check before adding the more complex DC modes.

Reviewed-by: Davidlohr Bueso <dave@stgolabs.net>

>Signed-off-by: Ira Weiny <ira.weiny@intel.com>
>
>---
>Changes for v1:
>[iweiny: new patch]
>[Jonathan: based on getting rid of the loop in cxl_dpa_set_mode]
>[Jonathan: standardize on resource_size() == 0]
>---
> drivers/cxl/core/hdm.c | 45 ++++++++++++++++++---------------------------
> 1 file changed, 18 insertions(+), 27 deletions(-)
>
>diff --git a/drivers/cxl/core/hdm.c b/drivers/cxl/core/hdm.c
>index 7d97790b893d..66b8419fd0c3 100644
>--- a/drivers/cxl/core/hdm.c
>+++ b/drivers/cxl/core/hdm.c
>@@ -411,44 +411,35 @@ int cxl_dpa_set_mode(struct cxl_endpoint_decoder *cxled,
>	struct cxl_memdev *cxlmd = cxled_to_memdev(cxled);
>	struct cxl_dev_state *cxlds = cxlmd->cxlds;
>	struct device *dev = &cxled->cxld.dev;
>-	int rc;
>
>+	guard(rwsem_write)(&cxl_dpa_rwsem);
>+	if (cxled->cxld.flags & CXL_DECODER_F_ENABLE)
>+		return -EBUSY;
>+
>+	/*
>+	 * Check that the mode is supported by the current partition
>+	 * configuration
>+	 */
>	switch (mode) {
>	case CXL_DECODER_RAM:
>+		if (!resource_size(&cxlds->ram_res)) {
>+			dev_dbg(dev, "no available ram capacity\n");
>+			return -ENXIO;
>+		}
>+		break;
>	case CXL_DECODER_PMEM:
>+		if (!resource_size(&cxlds->pmem_res)) {
>+			dev_dbg(dev, "no available pmem capacity\n");
>+			return -ENXIO;
>+		}
>		break;
>	default:
>		dev_dbg(dev, "unsupported mode: %d\n", mode);
>		return -EINVAL;
>	}
>
>-	down_write(&cxl_dpa_rwsem);
>-	if (cxled->cxld.flags & CXL_DECODER_F_ENABLE) {
>-		rc = -EBUSY;
>-		goto out;
>-	}
>-
>-	/*
>-	 * Only allow modes that are supported by the current partition
>-	 * configuration
>-	 */
>-	if (mode == CXL_DECODER_PMEM && !resource_size(&cxlds->pmem_res)) {
>-		dev_dbg(dev, "no available pmem capacity\n");
>-		rc = -ENXIO;
>-		goto out;
>-	}
>-	if (mode == CXL_DECODER_RAM && !resource_size(&cxlds->ram_res)) {
>-		dev_dbg(dev, "no available ram capacity\n");
>-		rc = -ENXIO;
>-		goto out;
>-	}
>-
>	cxled->mode = mode;
>-	rc = 0;
>-out:
>-	up_write(&cxl_dpa_rwsem);
>-
>-	return rc;
>+	return 0;
> }
>
> int cxl_dpa_alloc(struct cxl_endpoint_decoder *cxled, unsigned long long size)
>
>--
>2.44.0
>