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Tue, 26 Mar 2024 00:25:19 -0700 (PDT) Date: Tue, 26 Mar 2024 12:55:12 +0530 From: Manivannan Sadhasivam To: Christian Marangi Cc: Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Md Sadre Alam , Sricharan Ramabadhran , linux-mtd@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org Subject: Re: [PATCH v2 1/2] mtd: rawnand: qcom: Fix broken erase in misc_cmd_type in exec_op Message-ID: <20240326072512.GA8436@thinkpad> References: <20240325103053.24408-1-ansuelsmth@gmail.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <20240325103053.24408-1-ansuelsmth@gmail.com> On Mon, Mar 25, 2024 at 11:30:47AM +0100, Christian Marangi wrote: > misc_cmd_type in exec_op have multiple problems. With commit a82990c8a409 > ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") it was > reworked and generalized but actually broke the handling of the > ERASE_BLOCK command. > > Additional logic was added to the erase command cycle without clear > explaination causing the erase command to be broken on testing it on > a ipq806x nandc. > > Fix the erase command by reverting the additional logic and only adding > the NAND_DEV0_CFG0 additional call (required for erase command). > > Fixes: a82990c8a409 ("mtd: rawnand: qcom: Add read/read_start ops in exec_op path") > Cc: stable@vger.kernel.org > Signed-off-by: Christian Marangi > --- > Changes v2: > - Split this and rework commit description and title > > drivers/mtd/nand/raw/qcom_nandc.c | 5 ++--- > 1 file changed, 2 insertions(+), 3 deletions(-) > > diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c > index b079605c84d3..19d76e345a49 100644 > --- a/drivers/mtd/nand/raw/qcom_nandc.c > +++ b/drivers/mtd/nand/raw/qcom_nandc.c > @@ -2830,9 +2830,8 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub > nandc_set_reg(chip, NAND_EXEC_CMD, 1); > > write_reg_dma(nandc, NAND_FLASH_CMD, instrs, NAND_BAM_NEXT_SGL); > - (q_op.cmd_reg == OP_BLOCK_ERASE) ? write_reg_dma(nandc, NAND_DEV0_CFG0, > - 2, NAND_BAM_NEXT_SGL) : read_reg_dma(nandc, > - NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL); > + if (q_op.cmd_reg == OP_BLOCK_ERASE) > + write_reg_dma(nandc, NAND_DEV0_CFG0, 2, NAND_BAM_NEXT_SGL); So this only avoids the call to, 'read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL)' if q_op.cmd_reg != OP_BLOCK_ERASE. But for q_op.cmd_reg == OP_BLOCK_ERASE, the result is the same. I'm wondering how it results in fixing the OP_BLOCK_ERASE command. Can you share the actual issue that you are seeing? Like error logs etc... - Mani -- மணிவண்ணன் சதாசிவம்