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micalg=pgp-sha512; protocol="application/pgp-signature"; boundary="vy7v7ft7rt4enblx" Content-Disposition: inline In-Reply-To: <0f3759ee390f245dac447bbee038445ddfecbec0.1711383286.git.dsimic@manjaro.org> --vy7v7ft7rt4enblx Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Content-Transfer-Encoding: quoted-printable Hi, On Mon, Mar 25, 2024 at 05:19:04PM +0100, Dragan Simic wrote: > Following the approach used to enable the Mali GPU on the rk3588-evb1, [1] > do the same for the Pine64 QuartzPro64, which uses nearly identical hardw= are > design as the RK3588 EVB1. >=20 > The slight disadvantage is that the regulator coupling logic requires the > regulators to be always on, which is also noted in the comments. This is > obviously something to be improved at some point in the future, but should > be fine for now, especially because the QuartzPro64 isn't a battery-power= ed > board, so low power consumption isn't paramount. >=20 > [1] https://lore.kernel.org/linux-rockchip/20240325153850.189128-5-sebast= ian.reichel@collabora.com/ >=20 > Signed-off-by: Dragan Simic > --- FWIW Reviewed-by: Sebastian Reichel -- Sebastian > .../arm64/boot/dts/rockchip/rk3588-quartzpro64.dts | 14 ++++++++++++++ > 1 file changed, 14 insertions(+) >=20 > diff --git a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts b/arch/a= rm64/boot/dts/rockchip/rk3588-quartzpro64.dts > index 67414d72e2b6..68d432c61ea5 100644 > --- a/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts > +++ b/arch/arm64/boot/dts/rockchip/rk3588-quartzpro64.dts > @@ -285,6 +285,12 @@ &gmac0_rgmii_clk > status =3D "okay"; > }; > =20 > +&gpu { > + mali-supply =3D <&vdd_gpu_s0>; > + sram-supply =3D <&vdd_gpu_mem_s0>; > + status =3D "okay"; > +}; > + > &i2c2 { > status =3D "okay"; > =20 > @@ -491,11 +497,15 @@ rk806_dvs3_null: dvs3-null-pins { > regulators { > vdd_gpu_s0: dcdc-reg1 { > regulator-name =3D "vdd_gpu_s0"; > + /* regulator coupling requires always-on */ > + regulator-always-on; > regulator-boot-on; > regulator-enable-ramp-delay =3D <400>; > regulator-min-microvolt =3D <550000>; > regulator-max-microvolt =3D <950000>; > regulator-ramp-delay =3D <12500>; > + regulator-coupled-with =3D <&vdd_gpu_mem_s0>; > + regulator-coupled-max-spread =3D <10000>; > =20 > regulator-state-mem { > regulator-off-in-suspend; > @@ -545,11 +555,15 @@ regulator-state-mem { > =20 > vdd_gpu_mem_s0: dcdc-reg5 { > regulator-name =3D "vdd_gpu_mem_s0"; > + /* regulator coupling requires always-on */ > + regulator-always-on; > regulator-boot-on; > regulator-enable-ramp-delay =3D <400>; > regulator-min-microvolt =3D <675000>; > regulator-max-microvolt =3D <950000>; > regulator-ramp-delay =3D <12500>; > + regulator-coupled-with =3D <&vdd_gpu_s0>; > + regulator-coupled-max-spread =3D <10000>; > =20 > regulator-state-mem { > regulator-off-in-suspend; --vy7v7ft7rt4enblx Content-Type: application/pgp-signature; name="signature.asc" -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE72YNB0Y/i3JqeVQT2O7X88g7+poFAmYDJ/MACgkQ2O7X88g7 +prAXw//VFNyf9UpzEvJ2gmtgoAy+Uuxc8F9f3S6P58m/22P+THFPE3nNh1KnLZ4 1uhZc3Gj2sf0nvXTr2Zl6fdV0Sr0xEKUlQGnXAcxH33nZ/TGWhjFu3ivzF59L98T RwXbIIQWKQyBjcyrwF1ssq9zdt9ywbTAGUcjnt7NzuJ+S8+W3eoyvJzEXT7ij+fa rShpniZV50t8DeqNLKgbSyOybguQRRo7cgKwrgQGeoNxb1IXkmkOzhmZ07fd84i0 cusDkWNh2sk0wIL0xw9HRKuay2lY8PiPnS+th+hNf6SC5oF/CQfXjtXE//fNHhkI 0L9xLtdPKt3zeKSSe9kB2xZMC4UO1Q1bxPAOT2hzoF/vHb5Tp8mO4usGTrGNHspc OiAtZt+V+4JblDIiVGSc2KLuERFxEvsQMkKilCOQbNDoWwsC/E9aGbcgt0lkaRKi AE4i79EE3uHiIR1q8dg28P4JZpt1LjjZIq7QjUWSIqOwXWGOY8d6yflJn9z1bQZm YfukUZ3IyYfJxHHt2zL7qIAXTj3oMzr69XYnAvVuZbZkzYOQ1wcduuSC7tr+AN0Q ZuJ152h5AtoviSvADObkhjzYoH5NTd2ep2/MMy2qdtkPt4i5kTmtt7VMpl2szzhk AS0FfOoWCSS5Uj6y7k0SyE1B72dYHej+raY8jySawgt+kQV4cyU= =tY+0 -----END PGP SIGNATURE----- --vy7v7ft7rt4enblx--